Nexperia

74ALVC574

Octal D-type flip-flop; positive edge-trigger; 3-state

12. Abbreviations

Table 10. Abbreviations

Acronym

Description

CMOS

Complementary Metal-Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

74ALVC574 v.3

20210430

Product data sheet

-

74ALVC574 v.2

Modifications:

• The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

• Section 2: Reference to JESD36 removed.

• Section 7: Derating values for Ptot total power dissipation removed (errata).

• Package outline drawing of SOT764-1 (Fig. 13) updated.

74ALVC574 v.2

20071108

Product data sheet

-

74ALVC574 v.1

Modifications:

• The format of this data sheet has been redesigned to comply with the new identity guidelines

of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Section 3: DHVQFN20 package added.

• Section 7: derating values added for DHVQFN20 package.

• Section 11: outline drawing added for DHVQFN20 package.

74ALVC574 v.1

20020304

Product specification

-

-

74ALVC574

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 3 — 30 April 2021

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