Nexperia

74ALVC574

Octal D-type flip-flop; positive edge-trigger; 3-state

-40 °C to +85 °C

Symbol Parameter

Conditions

Min

Typ[1]

Max

Unit

see Fig. 7

VCC = 2.3 V to 2.7 V

100

200

-

MHz

VCC = 2.7 V

100

200

-

MHz

fmax

maximum frequency

VCC = 3.0 V to 3.6 V

150

300

-

MHz

per flip-flop; VI = GND to VCC; VCC = 3.3 V

[3]

outputs HIGH or LOW state

-

21

-

pF

CPD

power dissipation

capacitance

outputs 3-state

-

13

-

pF

[1] Typical values are measured at Tamb = 25 °C

[2] tpd is the same as tPHL and tPLH.

ten is the same as tPZH and tPZL.

tdis is the same as tPHZ and tPLZ.

[3] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

Σ(CL x VCC 2 x fo) = sum of the outputs

10.1. Waveforms and test circuit

mna894

CP input

Qn output

tPHL

tPLH

tW

1/fmax

VM

VOH

VI

GND

VOL

VM

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig. 7. Clock (CP) to output (Qn) propagation delays, the clock pulse width, and the maximum frequency

Table 8. Measurement points

Supply voltage

Input

Output

VCC

VM

VM

VX

VY

1.65 V to 1.95 V

0.5VCC

0.5VCC

VOL + 0.15 V

VOH - 0.15 V

2.3 V to 2.7 V

0.5VCC

0.5VCC

VOL + 0.15 V

VOH - 0.15 V

2.7 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

3.0 V to 3.6 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

74ALVC574

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 3 — 30 April 2021

7 / 15