TC6371AF datasheet(21/58 Pages) TOSHIBA

21 / 58 page

TC6371AF Specification

Rev. 1.8

02/01/22

TOTAL

PAGE NO.21

TOSHIBA CONFIDENTIAL

4.3

Clock / Reset

4.3.1

Clocks

The TC6371AF has two pins for input clocks: PCICLK and CLK32.

(1)

PCICLK: PCI clock input (33 MHz max)

PCI interface and internal operation reference clock.

(2)

CLK32: 32-kHz clock input

Used as detecting insertion and removal of SD card and SmartMedia and an interrupt detection clock

and for event detection in D3 state. The interrupt signal, implied insertion or detachment, shall be

generated synchronous to this clock signal. Note that if CLK32 is stopped, the interrupt detector does

not operate while TC6371AF is suspended or in D1-3 state set according to the PCI bus power

management interface specifications.

4.3.2

Reset

The TC6371AF uses the following two reset signals.

(1)

#PCIRST: PCI reset signal. Asserted at power on and at a transition to D3cold. When the input

destination of this signal is set to D3 state, the contents of the context register are saved and not

cleared even when #PCIRST is asserted.

(2)

#PWRST: Power-on reset signal. Asserted at power on. Asserting #PWRST clears all the TC6371AF’s

internal registers.

TC6371AF Datasheet(PDF) 21 Page - Toshiba Semiconductor