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VSP9425B Datasheet(PDF) 97 Page - Micronas |
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VSP9425B Datasheet(HTML) 97 Page - Micronas |
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97 / 126 page ![]() DATA SHEET VSP 94x2A Micronas Aug. 16, 2004; 6251-552-1DS 97 Subaddress A4h D7 KPNL4 [PP] Refer to A0h D6 KPL4 [PP] Refer to A0h D5 KINL4 [PP] Refer to A1h D4 KIL4 [PP] Refer to A1h D3-D0 LIMLR [PP] Limit LL-PLL lock-in range 0000: full lock-in range of ±5.85 % 0001: lock in range limited to ±3.8 % 0010: lock in range limited to ±2.55 % 0011: lock in range limited to ±1.27 % 0100: ock in range limited to ±0.63 % 0101: lock in range limited to ±0.32 % 0110: lock in range limited to ±0.19 % 0111: lock in range limited to ±0.13 % 1000: lock in range limited to ±5% 1001: lock in range limited to ±4.5 % 1010: lock in range limited to ±3.1 % 1011: lock in range limited to ±2.1 % 1100: lock in range limited to ±1.5 % 1101: lock in range limited to ±1% 1110: (reserved) 1111: (reserved) Subaddress B0 D6-D5 AGCTHD [CP-CD] AGC hysterisys 00: broad 01: medium 1 10: medium 2 11: small D4-D0 FEMAG [CP-CD] Fine Error characteristic 00000: smallest gain 10000: default (equal to A32 version) 11111: largest gain Table 3–8: I2C bus command description, continued Bit Name Description |
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