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UPD6P9 Datasheet(PDF) 36 Page - Renesas Technology Corp |
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UPD6P9 Datasheet(HTML) 36 Page - Renesas Technology Corp |
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36 / 73 page  34 µPD67, 67A, 68, 68A, 69 Data Sheet U14935EJ2V1DS 8. SYSTEM CLOCK OSCILLATOR The system clock oscillator consists of oscillators for ceramic resonators (fX = 3.5 to 4.5 MHz). Figure 8-1. System Clock The system clock oscillator stops oscillating when a reset is applied or in STOP mode. Caution When using the system clock oscillator, wire as follows in the area enclosed by the broken lines in the above figure to avoid an adverse effect from wiring capacitance. • Keep the wiring length as short as possible. • Do not cross the wiring with the other signal lines. Do not route the wiring near a signal line through which a high fluctuating current flows. • Always make the ground point of the oscillator capacitor the same potential as GND. Do not ground the capacitor to a ground pattern through which a high current flows. • Do not fetch signals from the oscillator. A capacitor (15 pF) for the oscillator can be incorporated via a mask option. XOUT XIN GND Ceramic resonator |
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