LXT971ABC datasheet(83/90 Pages) INTEL

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

Table 54. Interrupt Enable Register (Address 18)

Bit

Name

Description

Type 1

Default

18.15:9

Reserved

Write as 0; ignore on read.

R/W

N/A

18.8

Reserved

Write as 0; ignore on read.

R/W

18.7

ANMSK

Mask for Auto Negotiate Complete

1 = Enable event to cause interrupt.

0 = Do not allow event to cause interrupt.

R/W

18.6

SPEEDMSK

Mask for Speed Interrupt

1 = Enable event to cause interrupt.

0 = Do not allow event to cause interrupt.

R/W

18.5

DUPLEXMSK

Mask for Duplex Interrupt

1 = Enable event to cause interrupt.

0 = Do not allow event to cause interrupt.

R/W

18.4

LINKMSK

Mask for Link Status Interrupt

1 = Enable event to cause interrupt.

0 = Do not allow event to cause interrupt.

R/W

18.3

Reserved

Write as 0, ignore on read.

R/W

18.2

Reserved

Write as 0, ignore on read.

R/W

18.1

INTEN

1 = Enable interrupts.

0 = Disable interrupts.

R/W

18.0

TINT

1 = Force interrupt on MDINT.

0 = Normal operation.

R/W

1. R/W = Read /Write

LXT971ABC Datasheet(PDF) 83 Page - Intel Corporation

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