CAT13008 datasheet(9/14 Pages) CATALYST

9 / 14 page

CAT130xx

Doc. No. 1121 Rev. A

Characteristics subject to change without notice

Erase

Upon receiving an ERASE command and address,

the CS (Chip Select) pin must be deasserted for a

minimum of tCSMIN (Figure 7). The falling edge of CS

will start the self clocking clear cycle of the selected

memory location. The clocking of the SK pin is not

necessary after the device has entered the self

clocking mode. The ready/busy status of the

CAT130xx can be determined by selecting the device

and polling the DO pin. Once cleared, the content of a

cleared location returns to a logical “1” state.

Erase All

Upon receiving an ERAL command (Figure 8), the CS

(Chip Select) pin must be deselected for a minimum of

tCSMIN. The falling edge of CS will start the self clocking

clear cycle of all memory locations in the device. The

clocking of the SK pin is not necessary after the

device has entered the self clocking mode. The

ready/busy status of the CAT130xx can be determi–

ned by selecting the device and polling the DO pin.

Once cleared, the contents of all memory bits return to

a logical “1” state.

Figure 7. Erase Instruction Timing

Figure 8. ERAL Instruction Timing

STANDBY

HIGH-Z

AN-1

BUSY

READY

STATUS VERIFY

tSV

tHZ

tEW

tCS

STANDBY

tCS

HIGH-Z

BUSY

READY

STATUS VERIFY

tSV

tHZ

tEW

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