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UPD16682 Datasheet(PDF) 23 Page - Renesas Technology Corp

Part # UPD16682
Description  MOS INTEGRATED CIRCUIT
PDF  58 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD16682 Datasheet(HTML) 23 Page - Renesas Technology Corp

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Data Sheet S13368EJ4V0DS
21
µµµµ PD16682
10.2 Booster circuit
3x and 4x booster circuits have been incorporated in chip to generate the current driving the LCD.
When using the internal power supply, connect the booster-related capacitor between C1
+ and C1–, C2+ and C2–, and
C3
+ and C3–. Also, connect the level stabilization-related capacitor between VLCD and VSS and set D2 high to boost the
potential between VDD2 and VSS from 3 to 4 times.
Since the booster circuit uses signals from the internal oscillation circuit, the oscillation circuit must be operating.
The relation between the boosted voltage and the potential is described below.
The C1
+, C1–, C2+, C2–, C3+, C3–, and VDD2 pins all relate to the booster circuit, so the wire impedance should be
minimized.
Figure 10
−−−−1. 3x and 4x Booster Circuits
VDD2 = 3 V
VSS = 0 V
VLCD = 3VDD2 = 9 V
(During 3x boost mode)
VLCD = 4VDD2 = 12 V
(During 4x boost mode)
Caution When set to 3x boost mode, connect booster-related capacitors between C2
–
and C3
+ and between C1+ and C1–.
10.3 Voltage Regulator Circuit
The boost voltage that was generated at VLCD is output via the voltage regulator circuit as the LCD drive voltage
VLC1. Since the
µ PD16682 has a 64-level electronic volume function and an on-chip resistor for VLC1 voltage
regulation, various components can be used to configure a highly accurate voltage regulator circuit.
10.3.1 Use of on-chip resistor for VLC1 voltage regulation
The on-chip resistor for VLC1 voltage regulation and the electronic volume function can be used to regulate the
darkness of the LCD contents, not only by adding an external resistor but also by controlling the LCD drive voltage
VLC1 by using commands only. The VLC1 voltage can be determined using equation 10
−1 as within the range of VLC1 < VLCD.



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