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AS7050

Electrical Characteristics

Short Datasheet

• PUBLIC

DS001051

• v1-00 • 2022-Mar-31

│ 13

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Analog Front End

VOUT_DAC

Output

voltage DAC

dac_value<9:0>

0x3FF

REF_ADC=1.6 V

1.6

VOUT_AFE

Output

voltage range

AFE

0.3

1.4

RRANGE

Bias resistor

trimming

range

Across process and

voltage corners, 25 °C

500

kΩ

CGPIO

Load

capacitance

GPIO1/2

LDO

VLDO

HV power supply if

LDO_EN >1.26 V

2.3

5.5

if LDO_EN < 0.56 V

VDD

VLDO1V8

Output

voltage

Output voltage in

operating mode

1.8

CLDO

Output

capacitance

External blocking

capacitance

µF

GPIO

VIH

Input high

Switching threshold

while rising edge of

input signal is

introduced

0.54

1.26

VIL

Input low

Switching threshold

while falling edge of

input signal is

introduced

0.54

1.26

VOH

Output high

Pin’s source load

current is 2 mA

condition: E2=E4=”1”

(full available driver

strength)

VDDIO-0.4

VOL

Output low

Pin’s sink load current

is 2 mA

condition: E2=E4=”1”

(full available driver

strength)

0.4

SDA_MOSI, SCL, EXTCLK, CSXN, IFSEL, LDO_EN

VIH

Input high

Switching threshold

while rising edge of

input signal is

introduced

0.54

1.26

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