DATA SHEET • CLA SERIES: SILICON LIMITER DIODES AND CERAMIC HERMETIC PACKAGED DEVICES

Phone [408] 946-1968 • Fax [408] 946-1960 • hirel.sales@skyworksinc.com • www.skyworksinc.com

203235C • Isolink Proprietary Information • Products and Product Information are Subject to Change Without Notice. • July 10, 2017

4

Table 3. Typical Performance @ 25

°C @ 2.6 GHz, Z0 = 50 Ω1

Part Number

Insertion Loss

@ –10 dBm (dB)

CW Input Power

for 1 dB

Insertion Loss

(dBm)

Maximum CW

Input Power

(dBm)

Maximum

Pulsed Input

Power

(dBm) 2

Output @

Maximum

Pulsed Input

(dBm) 2

Recovery Time

(ns) 3

Spike Leakage

(ergs) 4

CLA4601

0.1

12

36

65

21

5

Note 5

CLA4602

0.1

12

36

65

24

5

Note 5

CLA4603

0.1

10

38

67

22

5

Note 5

CLA4604

0.1

11

40

70

24

5

Note 5

CLA4605

0.1

12

40

70

27

5

0.08

CLA4606

0.1

14

41

71

27

5

0.03

CLA4607

0.1

26

43

73

39

5

0.21

CLA4608

0.2

26

43

73

44

5

0.15

CLA4609

0.3

37

44

74

50

5

25.77

CLA4610

0.1

24

40

57

32

5

Note 5

1 Diode chip is mounted on a 0.5 oz Cu PC board using 1 to 2 mils of conductive epoxy. Bond wire connections are made with 0.8 mil Au wire. Limiter configured with shunt connected

diode and 22 nH ground return and 100 pF DC blocking capacitors.

2 Pulsed power measurements taken at 1 μs pulse width, @ f = 10 KHz, and 0.1% duty cycle.

3 Recovery time represents the transition time from the high-loss state to the low-loss state following the removal of a high-power input. It is defined as the time from the end of the high-

power pulse to the time when insertion loss has returned to within 3 dB of the quiescent (low-power) state.

4 Spike Leakage (ergs) = t

s

x Ps x 107 where ts is the spike width at the half-power point (in seconds) and PS is the maximum spike amplitude in watts.

5 Not detectable under current test conditions described in Note 2.