TPS73601DBVT datasheet(12/23 Pages) TI

12 / 23 page

www.ti.com

N(mVRMS) + 8.5

mVRMS

OUT(V)

(3)

Transient Response

Board Layout Recommendation to Improve

Internal Current Limit

Shutdown

(Fixed Voltage Version)

dV dt +

OUT

80kW ø RLOAD

(4)

(Adjustable Voltage Version)

dV dt +

OUT

80kW ø (R1 ) R2) ø RLOAD

(5)

Dropout Voltage

TPS736xx

SBVS038N – SEPTEMBER 2003 – REVISED JANUARY 2007

For

large

step

changes

load

current,

the

TPS736xx requires a larger voltage drop from VIN to

VOUT to avoid degraded transient response. The

boundary

this

transient

dropout

region

for CNR = 10nF.

approximately twice the dc dropout. Values of

This noise reduction effect is shown as RMS Noise

VIN – VOUT above this line insure normal transient

Voltage vs CNR in the Typical Characteristics section.

response.

The TPS73601 adjustable version does not have the

Operating in the transient dropout region can cause

noise-reduction pin available. However, connecting a

an increase in recovery time. The time required to

feedback capacitor, CFB , from the output to the FB

recover from a load transient is a function of the

pin will reduce output noise and improve load

magnitude of the change in load current rate, the

transient performance.

rate of change in load current, and the available

headroom

(VIN to VOUT voltage drop). Under

The TPS736xx uses an internal charge pump to

worst-case conditions [full-scale instantaneous load

develop an internal supply voltage sufficient to drive

change with (VIN – VOUT) close to dc dropout levels],

the gate of the NMOS pass element above VOUT.

the TPS736xx can take a couple of hundred

The charge pump generates ~250

µV of switching

microseconds to return to the specified regulation

noise

~4MHz;

however,

charge-pump

noise

accuracy.

contribution is negligible at the output of the regulator

for most values of IOUT and COUT.

The low open-loop output impedance provided by the

PSRR and Noise Performance

NMOS

pass

element

voltage

follower

configuration allows operation without an output

To improve ac performance such as PSRR, output

capacitor

for

many

applications.

with

any

noise, and transient response, it is recommended

regulator, the addition of a capacitor (nominal value

that the board be designed with separate ground

µF) from the output pin to ground will reduce

planes for VIN and VOUT, with each ground plane

undershoot magnitude but increase its duration. In

connected only at the GND pin of the device. In

the adjustable version, the addition of a capacitor,

addition, the ground connection for the bypass

CFB, from the output to the adjust pin will also

capacitor should connect directly to the GND pin of

improve the transient response.

the device.

The TPS736xx does not have active pull-down when

the output is over-voltage. This allows applications

that

connect

higher

voltage

sources,

such

The TPS736xx internal current limit helps protect the

alternate power supplies, to the output. This also

regulator during fault conditions. Foldback helps to

results in an output overshoot of several percent if

protect the regulator from damage during output

load current quickly drops to zero when a capacitor

short-circuit conditions by reducing current limit when

is connected to the output. The duration of overshoot

VOUT drops below 0.5V. See Figure 11 in the Typical

can be reduced by adding a load resistor. The

Characteristics section for a graph of IOUT vs VOUT.

overshoot decays at a rate determined by output

capacitor

COUT and the

internal/external

load

resistance. The rate of decay is given by:

The Enable pin is active high and is compatible with

standard TTL-CMOS levels. VEN below 0.5V (max)

turns the regulator off and drops the ground pin

current to approximately 10nA. When shutdown

capability is not required, the Enable pin can be

connected to VIN. When a pull-up resistor is used,

and operation down to 1.8V is required, use pull-up

resistor values below 50k

Ω.

The TPS736xx uses an NMOS pass transistor to

achieve extremely low dropout. When (VIN – VOUT) is

less than the dropout voltage (VDO), the NMOS pass

device is in its linear region of operation and the

input-to-output resistance is the RDS-ON of the NMOS

pass element.

Submit Documentation Feedback

TPS73601DBVT Datasheet(PDF) 12 Page - Texas Instruments

TPS73601DBVT Datasheet(HTML) 12 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Datasheet Download

Link URL