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AM6934 Datasheet(PDF) 65 Page - Texas Instruments |
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AM6934 Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 300 page ![]() Table 6-1. Pin Attributes (ALY Package) (continued) Ball Num [1] Ball Name [2] PADCFG Register [15] PADCFG Address [16] Signal Name [3] Mux Mode [4] Signal Type [5] I/O Voltage [6] Ball State DURING Reset (RX/TX/PULL) [7] Ball State AFTER Reset (RX/TX/PULL) [8] Mux Mode AFTER Reset [9] Pull Type [10] Power [11] Hys [12] Voltage Buffer Type [13] IO RET [14] AT5 SERDES1_RX1_P SGMII4_RXP0 I 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY PCIE0_RXP1 I AU2 SERDES1_RX2_N PCIE2_RXN0 I 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY PCIE0_RXN2 I SGMII1_RXN0 I AU3 SERDES1_RX2_P SGMII1_RXP0 I 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY PCIE2_RXP0 I PCIE0_RXP2 I AT1 SERDES1_RX3_N PCIE0_RXN3 I 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY PCIE2_RXN1 I SGMII2_RXN0 I AT2 SERDES1_RX3_P PCIE0_RXP3 I 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY SGMII2_RXP0 I PCIE2_RXP1 I AV6 SERDES1_TX0_N SGMII3_TXN0 O 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY PCIE0_TXN0 O AV7 SERDES1_TX0_P PCIE0_TXP0 O 1.8 V VDDA_0P8_S ERDES0_1 / VDDA_0P8_S ERDES_C0_1 / VDDA_1P8_S ERDES0_1 4L_PHY SGMII3_TXP0 O www.ti.com AM69A, AM69 SPRSP92A – FEBRUARY 2023 – REVISED AUGUST 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 65 Product Folder Links: AM69A AM69 |
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