ATMEGA32 datasheet(11/347 Pages) ATMEL

11 / 347 page

ATmega32(L)

2503J–AVR–10/06

• Bit 0 – C: Carry Flag

The Carry Flag C indicates a carry in an arithmetic or logic operation. See the “Instruc-

tion Set Description” for detailed information.

General Purpose

The Register File is optimized for the AVR Enhanced RISC instruction set. In order to

achieve the required performance and flexibility, the following input/output schemes are

supported by the Register File:

•

One 8-bit output operand and one 8-bit result input

•

Two 8-bit output operands and one 8-bit result input

•

Two 8-bit output operands and one 16-bit result input

•

One 16-bit output operand and one 16-bit result input

Figure 4 shows the structure of the 32 general purpose working registers in the CPU.

Figure 4. AVR CPU General Purpose Working Registers

Most of the instructions operating on the Register File have direct access to all registers,

and most of them are single cycle instructions.

As shown in Figure 4, each register is also assigned a data memory address, mapping

them directly into the first 32 locations of the user Data Space. Although not being phys-

ically implemented as SRAM locations, this memory organization provides great

flexibility in access of the registers, as the X-, Y-, and Z-pointer Registers can be set to

index any register in the file.

Addr.

$00

$01

$02

…

R13

$0D

General

R14

$0E

Purpose

R15

$0F

Working

R16

$10

Registers

R17

$11

…

R26

$1A

X-register Low Byte

R27

$1B

X-register High Byte

R28

$1C

Y-register Low Byte

R29

$1D

Y-register High Byte

R30

$1E

Z-register Low Byte

R31

$1F

Z-register High Byte

ATMEGA32 Datasheet(PDF) 11 Page - ATMEL Corporation

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