CS5155 datasheet(12/18 Pages) ONSEMI

12 / 18 page

CS5155

http://onsemi.com

Figure 18. CS5155 Demonstration Board During Power

Up. Power Good Signal is Activated when Output

Voltage Reaches 1.70 V.

M 2.50 ms

Trace 4− 5.0 V Input (2.0 V/div.)

Trace 3 − 12 V Input (VCC1) and (VCC2) (10 V/div.)

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 2− Power Good Signal (2.0 V/div.)

Selecting External Components

The CS5155 can be used with a wide range of external

power components to optimize the cost and performance of

a particular design. The following information can be used

as general guidelines to assist in their selection.

NFET Power Transistors

Both logic level and standard MOSFETs can be used. The

reference designs derive gate drive from the 12 V supply

which is generally available in most computer systems and

use logic level MOSFETs. A charge pump may be easily

implemented to support 5.0 V only systems. Multiple

MOSFETs may be paralleled to reduce losses and improve

efficiency and thermal management.

Voltage applied to the MOSFET gates depends on the

application circuit used. Both upper and lower gate driver

outputs are specified to drive to within 1.5 V of ground when

in the low state and to within 2.0 V of their respective bias

supplies when in the high state. In practice, the MOSFET

gates will be driven rail to rail due to overshoot caused by the

capacitive load they present to the controller IC. For the

typical application where VCC1 = VCC2 = 12 V and 5.0 V is

used as the source for the regulator output current, the

following gate drive is provided;

VGATE(H) + 12 V * 5.0 V + 7.0 V, VGATE(L) + 12 V

(see Figure 19.)

Figure 19. CS5155 Gate Drive Waveforms Depicting

Rail to Rail Swing

M 1.00 μs

Math 1 = VGATE(H) − 5.0 VIN

Trace 3 = VGATE(H) (10 V/div.)

Trace 4 = VGATE(L) (10 V/div.)

Trace 2− Inductor Switching Nodes (5.0 V/div.)

The most important aspect of MOSFET performance is

RDSON, which effects regulator efficiency and MOSFET

thermal management requirements.

The power dissipated by the MOSFETs may be estimated

as follows;

Switching MOSFET:

Power + ILOAD2

RDSON

duty cycle

Synchronous MOSFET:

Power + ILOAD2

RDSON

(1 * duty cycle)

Duty Cycle =

VOUT ) (ILOAD

RDSON OF SYNCH FET)

VIN)(ILOAD

RDSON OF SYNCH FET)

* (ILOAD

RDSON OF SWITCH FET)

Off Time Capacitor (COFF)

The COFF timing capacitor sets the regulator off time:

TOFF + COFF

4848.5

When the VFFB pin is less than 1.0 V, the current charging

the COFF capacitor is reduced. The extended off time can be

calculated as follows:

TOFF + COFF

24, 242.5

Off time will be determined by either the TOFF time, or the

time out timer, whichever is longer.

CS5155 Datasheet(PDF) 12 Page - ON Semiconductor

CS5155 Datasheet(HTML) 12 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL