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DAP018 Datasheet(PDF) 4 Page - ON Semiconductor |
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DAP018 Datasheet(HTML) 4 Page - ON Semiconductor |
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4 / 28 page ![]() DAP018A/B/C/D/F http://onsemi.com 4 1 2 Latch + - S Q Q R + Vlatch + - fault VCC and Logic Management 5 V on VCC Reset Power on reset VCCON VCC(min) VCClatch + + - IC1 HV 14 IpFlag Fault 13 12 11 BO 10 VCC 9 Drv VDD 65/100 kHz Clock S Q Q R + - 5 ms SS IpFlag Rramp 6 FB VDD RFB 7 CS LEB 8 GND + - Vskip 5 Fold Ifold VDD + 2.iCjit + - iCjit VDD Frequency Modulation + Vtimfault IpFlag Power On Reset VDD Itim 4 Jitter 3 Timer Figure 2. Internal Circuit Architecture Vfold /4.2 /4.2 - + + Frequency Foldback + - + OPP Soft−start ended? Yes = 1, No = 0 VOTP IOTP from fault in OCP latched versions 20 ms time constant 5 V reset BO release (B & D) Skip Standby? → bias reduction The soft−start is activated during: − the startup sequence − the auto−recovery burst mode − a brown−out release (B & D) VFB/4.2 > Vset > Vfold/4.2 VOPP Vlimit + VOPP + Vlimit Clamp BO (dble hiccup reset) + - VBO + IBO B and D versions turned off when BO ok VDD Vfold + BO ok 20 ms time constant NC OTP |
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