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CS51311GD14 Datasheet(PDF) 1 Page - ON Semiconductor

Part # CS51311GD14
Description  Synchronous CPU Buck Controller for 12 V and 5.0 V Applications
PDF  21 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS51311GD14 Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 3
1
Publication Order Number:
CS51311/D
CS51311
Synchronous CPU
Buck Controller for 12 V
and 5.0 V Applications
The CS51311 is a synchronous dual NFET Buck Regulator
Controller. It is designed to power the core logic of the latest high
performance CPUs. It uses the V2™ control method to achieve the
fastest possible transient response and best overall regulation. It
incorporates many additional features required to ensure the proper
operation and protection of the CPU and Power system. The CS51311
provides the industry’s most highly integrated solution, minimizing
external component count, total solution size, and cost.
The CS51311 is specifically designed to power Intel’s Pentium® II
processor and includes the following features: 5−bit DAC with 1.2%
tolerance, Power Good output, overcurrent hiccup mode protection,
VCC monitor, soft start, adaptive voltage positioning, adaptive FET
non−overlap time, and remote sense. The CS51311 will operate over
an 8.4 V to 14 V range and is available in 14 lead narrow body surface
mount package.
Features
• Synchronous Switching Regulator Controller for CPU VCORE
• Dual N−Channel MOSFET Synchronous Buck Design
• V2 Control Topology
• 200 ns Transient Loop Response
• 5−Bit DAC with 1.2% Tolerance
• Hiccup Mode Overcurrent Protection
• 40 ns Gate Rise and Fall Times (3.3 nF Load)
• 65 ns Adaptive FET Non−Overlap Time
• Adaptive Voltage Positioning
• Power Good Output Monitors Regulator Output
• VCC Monitor Provides Undervoltage Lockout
• Enable Through Use of the COMP Pin
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
CS51311GD14
SO−14
55 Units/Rail
CS51311GDR14
SO−14
2500 Tape & Reel
PIN CONNECTIONS
MARKING DIAGRAM
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
SO−14
D SUFFIX
CASE 751A
1
CS51311
AWLYWW
14
1
14
VCC
VOUT
GATE(H)
VFB
GND
VID4
GATE(L)
VID3
114
PWRGD
VID2
COFF
VID1
COMP
VID0


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