MP86936

– INTELLI-PHASETM WITH INTEGRATED DRIVER AND MOSFETS

MP86936 Rev. 1.1

www.MonolithicPower.com

9

8/4/2023

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2023 MPS. All Rights Reserved.

OPERATION

The MP86936 is a 60A, monolithic half-bridge

driver with integrated MOSFETs. This Intelli-

PhaseTM solution is ideal for multi-phase buck

regulators. An external 3.3V is required to supply

both VDD and VDRV. When the VIN and VDD

signals are sufficiently high, operation begins.

APPLICATION INFORMATION

Pulse-Width Modulation (PWM)

The PWM pin is capable of handling tri-state

input. When the PWM input signal is within the

tri-state threshold window for 50ns, the high-side

MOSFET (HS-FET) turns off and the low-side

MOSFET (LS-FET) turns on and remains in

diode

emulation

mode

until

zero-current

detection (ZCD) is reached. The tri-state PWM

input can be from a forced mid-voltage PWM

signal or made by floating the PWM input, in

which case the internal current source charges

the signal to a middle voltage. See the PWM

Timing Diagram on page 5 for the propagation

delay definition from PWM to the SW node.

Standby Mode

When the SYNC pin is floating or forced to a mid-

state voltage for 2

μs, the MP86936 enters

standby mode. In standby mode, the part shuts

down and both the CS and VTEMP/FLT outputs

are disabled. The fault latch (VTEMP/FLT) is not

be reset by entering standby mode.

Diode Emulation Mode

In diode emulation mode, if PWM is either low or

in tri-state input and the inductor current (IL) is

positive, the LS-FET turns. The LS-FET turns off

if IL goes negative or crosses the ZCD threshold.

Diode emulation mode can be enabled by any of

the following conditions:

• Pulling the SYNC pin low

• Drive PWM to a middle state

• Floating the PWM pin

Current Sense (CS)

CS is a bidirectional current source proportional

to IL. The current-sense gain (GCS) is 8.5μA/A,

and a resistor is used to program the voltage

gain proportional to IL if needed.

The CS output has two states: active and

standby (see Table 1). In standby mode, the CS

circuit is disabled, and requires 40

μs to wake up

from standby mode to active mode.

Table 1: CS Output States

PWM

SYNC

CS

PWM

Hi

Active

PWM

Low

Active

x

Hi-Z (or middle)

Standby

The CS voltage (VCS) range (0.7V to 2.1V) is

required to achieve an accurate CS current

output report. Connect a resistor (RCS) from the

CS pin to an external voltage that is capable of

sinking a small current to provide enough voltage

to meet the required operating voltage range. A

proper reference voltage (VCM) and RCS value

can be calculated with Equation (1):

CS

CS

CM

0.7V I

R

V

2.1V





+



(1)

Where VCM is a reference voltage connected to

RCS.

ICS can be calculated with Equation (2):

CS

L

CS

I

I

G

=

(2)

The Intelli-PhaseTM

’s current-sense output can

be used by the controller to accurately monitor

the output current (IOUT). The cycle-by-cycle

current information from the CS pin can be used

for

phase

current

balancing,

over-current

protection (OCP), and active voltage positioning

(output voltage droop).

Positive and Negative Inductor Current limit

If an over-current (OC) condition is detected on

the HS-FET, the HS-FET turns off for that PWM

cycle. If the HS current limit is exceeded for four

consecutive cycles, then the HS-FET latches off,

VTEMP/FLT is pulled high to VDD, the LS-FET

turns on until ZCD is reached, and then the LS-

FET turns off. Recycle the power on VIN and

VDD to release the latch and restart the device.

Once the latch is released and the MP86936

restarts, it resumes normal operation.

If the LS-FET detects a -30A current, the LS-FET

turns off for 200ns to limit the negative current.

The LS-

FET’s negative current limit does not

trigger a fault report.