MPM3612

– 22V, 1A, ULTRA-LOW IQ STEP-DOWN POWER MODULE

MPM3612 Rev. 1.0

MonolithicPower.com

13

3/15/2023

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© 2023 MPS. All Rights Reserved.

The SS voltage (VSS) takes over the reference

voltage (VREF) to the PWM comparator. VOUT

ramps up smoothly with VSS. Once VSS exceeds

the VREF, it continues to ramp up while the PWM

comparator compares VREF and the FB voltage

(VFB). At this point, SS finishes and the device

enters steady state operation.

The internal soft-start time (tSS) is fixed to 1.3ms

(VOUT from 10% to 90%).

Pre-Biased Start-Up

The MPM3612 is designed for monotonic start-

up into pre-biased loads. If VOUT is pre-biased to

a certain voltage during start-up, VBST is

refreshed and charged and VSS is charged. If

VBST exceeds its rising threshold voltage and VSS

exceeds the sensed VFB, the part begins normal

operation.

Power Good (PG)

The MPM3612 features a power good (PG)

output to indicate whether VOUT is ready. The PG

pin is an open-drain output. Connect PG to VCC

or another voltage source via a pull-up resistor

(e.g. 100kΩ). When VIN is applied, the PG pin is

pulled down to GND before VSS reaches 1V.

Once VSS reaches 1V and VFB exceeds 92% of

VREF, there is a 120μs delay and PG is pulled

high. During normal operation, PG is pulled low

if VFB drops below 87% of VREF (after 50μs delay).

If

under-voltage

lockout

(UVLO)

or

over-

temperature protection (OTP) occurs, or EN

goes low, the PG pin is pulled low immediately.

If over-current protection (OCP) occurs and VFB

drops below 87% of VREF, there is a 50μs delay

and PG is pulled low.

PG also indicates whether an output over-

voltage (OV) condition has occurred. If VOUT

exceeds 113% of the VREF rising threshold, PG

pulls low. If VOUT falls below 108% of the VREF

falling threshold, PG pulls high again. The PG

deglitch timer is 120

μs and 50μs for the rising

and falling thresholds, respectively. Note that

this threshold is below the OVP discharge

threshold.

Low-Dropout (LDO) Operation

To improve dropout, the MPM3612 is designed

to extend the HS-FET on time if the minimum off

time (tOFF_MIN) is triggered. In this scenario, the

HS-FET on time is extended and fSW drops. The

typical minimum fSW (fSW_MIN) is 240kHz. If fSW

drops to 240kHz, the duty cycle reaches its

maximum (DMAX) for the duration of the on time.

If VIN continues to drop, the MPM3612 operates

at 240kHz and VOUT drops. The typical max duty

cycle (DMAX) can be calculated with Equation (2):

MAX

OFF_MIN

SW_MIN

D

= 1- t

x f

(2)

Where tOFF_MIN = 140ns, and fSW_MIN = 240kHz.

Output Over-Voltage Protection (OVP)

The MPM3612 monitors VOUT. If VOUT exceeds

120% of its regulated voltage for more than 8

μs,

the device enters OVP discharge mode. In OVP

discharge mode, the LS-FET turns on and

remains on until the low-side (LS) current

reaches

the

negative

current

limit.

This

discharges VOUT and tries to keep it within its

normal range. If a VOUT OV condition still exists,

the LS-FET turns on again after a fixed delay to

repeat the discharge behavior.

Once VFB falls below 110% of VREF, the

MPM3612 exits OVP discharge mode.

If VIN exceeds 24V during OVP discharge mode,

input OVP occurs and the MPM3612 shuts down

until VIN drops below 22V. Then the MPM3612

restarts and resumes normal operation. Input

OVP is only active during output OV conditions.

Output Discharge

The MPM3612 offers a discharge function that

provides an active discharge path for the

external COUT. This function is active when the

part is disabled via EN (EN is pulled low). When

EN is low, the HS-FET turns off and the LS-FET

turns to discharge VOUT. When the LS current

reaches its negative current limit, the LS-FET

turns off, then turns on again after a fixed delay.

This behavior repeats until FB goes low.

Over-Current Protection (OCP) and Short-

Circuit Protection (SCP)

The MPM3612 includes valley current limit

control. When the LS-FET is on, IL is monitored.

If the sensed IL exceeds the valley current limit

threshold, the device enters OCP and the HS-

FET is not allowed to turn on until IL falls below

the valley current limit. Meanwhile, VOUT drops

until it is below the under-voltage (UV) threshold,

typically 60% below VREF.