MAX997ESA datasheet(3/14 Pages) MAXIM

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Single/Dual/Quad, Ultra-High-Speed, +3V/+5V,

Beyond-the-Rails Comparators

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ELECTRICAL CHARACTERISTICS (continued)

(VCC = +2.7V to +5.5V, VCM = 0V, COUT = 5pF, VSHDN = 0V, VLE = 0V, unless otherwise noted.) (Note 1)

Note 1: The MAX961EUA/MAX962EUA/MAX997EUA/MAX999EUK are 100% production tested at TA = +25°C; all temperature specifica-

tions are guaranteed by design.

Note 2: Inferred by CMRR. Either input can be driven to the absolute maximum limit without false output inversion, provided that the other

input is within the input voltage range.

Note 3: The input-referred trip points are the extremities of the differential input voltage required to make the comparator output change

state. The difference between the upper and lower trip points is equal to the width of the input-referred hysteresis zone. (See

Figure 1.)

Note 4: Input offset voltage is defined as the mean of the trip points.

Note 5: CMRR = (VOSL - VOSH) / 5.2V, where VOSL is the offset at VCM = -0.1V and VOSH is the offset at VCM = 5.1V.

Note 6: PSRR = (VOS2.7 - VOS5.5) / 2.8V, where VOS2.7 is the offset voltage at VCC = 2.7V, and VOS5.5 is the offset voltage at

VCC = 5.5V.

Note 7: Propagation delay for these high-speed comparators is guaranteed by design characterization because it cannot be accurately

measured using automatic test equipment. A statistically significant sample of devices is characterized with a 200mV step and

100mV overdrive over the full temperature range. Propagation delay can be guaranteed by this characterization, since DC tests

ensure that all internal bias conditions are correct. For low overdrive conditions, VTRIP is added to the overdrive.

Note 8: Guaranteed by design.

MAX961/MAX963/MAX964/

MAX997, VOUT = 0.5V and

VCC - 0.5V

Delay until output is valid

Delay until output is high-Z

(>10kΩ)

MAX961/MAX963 (Note 8)

5mV overdrive (Note 7)

MAX961/MAX963 (Note 8)

VLOGIC = 0V or VCC

VCC = 5V

Between tPD- and tPD+

250

tON

Shutdown Disable Time

150

tOFF

Shutdown Time

tLPD

Latch Propagation Delay

tLPW

Latch Pulse Width

Latch-to-Data Hold Time

tSU

Data-to-Latch Setup Time

0.3

tSKEW

Propagation-Delay Skew

0.3

tPD

Differential Propagation

Delay

µA

Shutdown Output

Leakage Current

Output Capacitance

4.5

tPD

Propagation Delay

µA

±15

IIL, IIH

Logic Input Current

(VCC / 2)

- 0.4

VIL

Logic Input Low

2.3

tR, tF

Rise/Fall Time

(VCC / 2)

+ 0.4

VIH

Logic Input High

TA = +25°C

8.5

±30

(VCC / 2)

- 0.4

(VCC / 2)

+ 0.4

TMIN to TMAX

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

MIN

MAX

Between any two channels or

outputs (Q/Q)

MAX962/MAX964, VCC = 5V

MAX961/MAX963/MAX964/

MAX997, VCC = 5V

0.27

0.5

ISHDN

Shutdown Supply Current

per Comparator

0.5

MAX997/MAX999, VCC = 5V

6.5

MAX961/MAX963, VCC = 5V

7.2

Supply Current

per Comparator

ICC

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