CAT9554, CAT9554A

6

Doc. No. 25088, Rev. B

© 2006 by Catalyst Semiconductor, Inc.

Characteristics subject to change without notice

These inputs are used for extended addressing capability.

When hardwired, up to eight CAT9554/9554As may be

addressed on a single bus system. The levels on these

from the slave address byte.

Any of these pins may be configured as input or output.

Figure 4. When an I/O is configured as an input, the Q1

and Q2 output transistors are off creating a high

impedance input with a weak pull-up resistor (typical 100

k

Ω). If the I/O pin is configured as an output, the push-

pull output stage is enabled. Care should be taken if an

external voltage is applied to an I/O pin configured as an

output due to the low impedance paths that exist between

PIN DESCRIPTION

SCL: Serial Clock

The serial clock input clocks all data transferred into or

out of the device. The SCL line requires a pull-up resistor

if it is driven by an open drain output.

SDA: Serial Data/Address

The bidirectional serial data/address pin is used to

transfer all data into and out of the device. The SDA pin

is an open drain output and can be wire-ORed with other

open drain or open collector outputs. A pull-up resistor

must be connected from SDA line to Vcc. The value of

minimum and maximum values from Figure 2 and Figure

3 (see Note).

Supply Voltage

Bus Capacitance

can be a resistor. For bus loads between 200pF and 400pF, the pull-up device can be a current source

(Imax = 3mA) or a switched resistor circuit.

(IOL = 3mA @ VOLmax)

2

2.5

1.5

1

0.5

0

2

2.4 2.8 3.2 3.6

4

4.4 4.8 5.2 5.6

VCC (V)

(Fast Mode I2C Bus / tr max = 300ns)

8.00

7.00

6.00

5.00

4.00

3.00

2.00

1.00

0.00

50

100

150

200

250

300

350

400

CBUS (pF)