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AD8021

Rev. F | Page 22 of 28

DRIVING 16-BIT ADCs

Low noise and adjustable compensation make the AD8021

especially suitable as a buffer/driver for high resolution ADCs.

As seen in Figure 19, the harmonic distortion is better than 90 dBc

at frequencies between 100 kHz and 1 MHz. This is an

advantage for complex waveforms that contain high frequency

information, because the phase and gain integrity of the sampled

waveform can be preserved throughout the conversion process.

The increase in loop gain results in improved output regulation

and lower noise when the converter input changes state during

a sample. This advantage is particularly apparent when using

16-bit high resolution ADCs with high sampling rates.

Figure 63 shows a typical ADC driver configuration. The

AD8021 is in an inverting gain of −7.5, fC is 65 kHz, and its

output voltage is 10 V p-p. The results are listed in Table 7.

–

200

56pF

1.5k

10pF

–12V

AD7665

570kSPS

+5V

590

+12V

AD8021

Figure 63. Inverting ADC Driver, Gain = −7.5, fC = 65 kHz

Table 7. Summary of ADC Driver Performance (fC = 65 kHz,

VOUT = 10 V p-p)

Parameter

Measurement

Unit

Second Harmonic Distortion

−101.3

dBc

Third Harmonic Distortion

−109.5

dBc

THD

−100.0

dBc

SFDR

+100.3

dBc

Figure 64 shows another ADC driver connection. The circuit

was tested with a noninverting gain of 10.1 and an output

voltage of approximately 20 V p-p for optimum resolution and

noise performance. No filtering was used. An FFT was

performed using Analog Devices evaluation software for the

AD7665 16-bit converter. The results are listed in Table 8.

+5V

AD8021

–

–12V

+12V

AD7665

570kSPS

750

OPTIONAL CF

ADC

82.5

Figure 64. Noninverting ADC Driver, Gain = 10, fC = 100 kHz

Table 8. Summary of ADC Driver Performance

(fC = 100 kHz, VOUT = 20 V p-p)

Parameter

Measurement

Unit

Second Harmonic Distortion

−92.6

dBc

Third Harmonic Distortion

−86.4

dBc

THD

−84.4

dBc

SFDR

+5.4

dBc

DIFFERENTIAL DRIVER

The AD8021 is uniquely suited as a low noise differential driver

for many ADCs, balanced lines, and other applications requiring

differential drive. If pairs of internally compensated op amps are

configured as inverter and follower, the noise gain of the inverter

is higher than that of the follower section, resulting in an

imbalance in the frequency response (see Figure 66).

A better solution takes advantage of the external compensation

feature of the AD8021. By reducing the CCOMP value of the

inverter, its bandwidth can be increased to match that of the

follower, avoiding compromises in gain bandwidth and phase

delay. The inverting and noninverting bandwidths can be

closely matched using the compensation feature, thus

minimizing distortion.

Figure 65 illustrates an inverter-follower driver circuit operating

at a gain of 2, using individually compensated AD8021s. The

values of feedback and load resistors were selected to provide a

total load of less than 1 kΩ, and the equivalent resistances seen

at each op amp’s inputs were matched to minimize offset voltage

and drift. Figure 67 is a plot of the resulting ac responses of

driver halves.

AD8021

–

7pF

249

499

G = +2

499

49.9

VOUT1

–VS

AD8021

–

5pF

232

G = –2

664

VOUT2

–VS

332

VIN

Figure 65. Differential Amplifier

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