SY89809LTH datasheet(2/7 Pages) MICREL

2 / 7 page

Precision Edge®

SY89809L

Micrel, Inc.

M9999-092005

hbwhelp@micrel.com or (408) 955-1690

PACKAGE/ORDERING INFORMATION

32 31 30 29 28 27 26 25

1011 12 131415 16

VCCI

HSTL_CLK

/HSTL_CLK

CLK_SEL

LVPECL_CLK

/LVPECL_CLK

GND

VCCO

/Q3

/Q4

/Q5

VCCO

Top View

TQFP

T32-1

32-Pin TQFP (T32-1)

Pin Number

Pin Name

Type

Pin Function

2, 3

HSTL_CLK,

HSTL

Differential clock input selected by CLK_SEL. Can be left floating if not

/HSTL_CLK

Input

selected. Floating input, if selected produces an indeterminate output. HSTL

input signal requires external termination 50

Ω to GND.

5, 6

LVPECL_CLK,

LVPECL

Differential clock input selected by CLK_SEL. Can be left floating. Floating

/LVPECL_CLK

Input

input, if selected produces a LOW at the output (internal 75

Ω pull-downs).

Requires external termination. 75k

Ω pull-up.

CLK_SEL

LVTTL

Selects HSTL_CLK input when LOW and LVPECL_CLK output when HIGH.

Input

11k

Ω pull-up.

LVTTL

Enable input synchronized internally to prevent glitching of the Q0-Q8 and

Input

/Q0-/Q8 outputs. Must be a minimum of three clock periods wide if

synchronous with the CLK inputs and must meet the tS and tH requirements

(refer to AC Electrical Characteristics). If asynchronous, must be a minimum

of four clock periods wide. 11k

Ω pull-up.

31, 29, 27, 23,

Q0–Q8

HSTL

Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and

21, 19, 15, 13,

Output

LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated

with 50

Ω to GND. Q0–Q8 outputs are static LOW when OE = LOW. Unused

output pairs may be left floating.

30, 28, 26, 22,

/Q0–/Q8

HSTL

Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and

20, 18, 14, 12,

Output

LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated

with 50

Ω to GND. /Q0–/Q8 outputs are static HIGH when OE = LOW.

Unused output pairs may be left floating.

VCCI

VCC Core

Core VCC connected to 3.3V supply. Bypass with 0.1µF in parallel with

Power

0.01

µF low ESR capacitors as close to V

CCI pin as possible.

9, 16, 17, 24,

VCCO

VCC Output

Output Buffer VCC connected to 1.8V supply. Bypass with 0.1µF in parallel

25, 32

Power

with 0.01

µF low ESR capacitors as close to V

CCO pins as possible. All VCCO

pins should be connected together on the PCB.

GND

Ground

Ground.

PIN DESCRIPTION

Ordering Information(1)

Package

Operating

Package

Lead

Part Number

Type

Range

Marking

Finish

SY89809LTC

T32-1

Industrial

SY89809LTC

Sn-Pb

SY89809LTCTR(2)

T32-1

Industrial

SY89809LTC

Sn-Pb

SY89809LTH(3)

T32-1

Industrial

SY89809LTH with

NiPdAu

Pb-Free bar line indicator Pb-Free

SY89809LTHTR(2, 3)

T32-1

Industrial

SY89809LTH with

NiPdAu

Pb-Free bar line indicator Pb-Free

Notes:

1. Contact factory for die availability. Dice are guaranteed at T

A = 25°C, DC Electricals only.

2. Tape and Reel.

3. Pb-Free package is recommended for new designs.

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