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1172 Datasheet(PDF) 13 Page - Texas Instruments |
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1172 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 50 page ![]() CC1150 Preliminary Data Sheet (rev. 1.0.) SWRS037 Page 13 of 49 16 Configuration Software CC1150 can be configured using the SmartRF Studio software, available for download from http://www.chipcon.com. The SmartRF Studio software is highly recommended for obtaining optimum register settings, and for evaluating performance and functionality. A screenshot of the SmartRF Studio user interface for CC1150 is shown in Figure 5. Figure 5: SmartRF Studio user interface 17 4-wire Serial Configuration and Data Interface CC1150 is configured via a simple 4-wire SPI- compatible interface (SI, SO, SCLK and CSn) where CC1150 is the slave. This interface is also used to read and write buffered data. All address and data transfer on the SPI interface is done most significant bit first. All transactions on the SPI interface start with a header byte containing a read/write bit, a burst access bit and a 6-bit address. During address and data transfer, the CSn pin (Chip Select, active low) must be kept low. If CSn goes high during the access, the transfer will be cancelled. When CSn goes low, the MCU must wait until the CC1150 SO pin goes low before starting to transfer the header byte. This indicates that the voltage regulator has stabilized and the crystal is running. Unless the chip was in the SLEEP or XOFF states, the SO pin will always go low immediately after taking CSn low. 17.1 Chip Status Byte When the header byte is sent on the SPI interface, the chip status byte is sent by the CC1150 on the SO pin. The status byte contains key status signals, useful for the MCU. The first bit, s7, is the CHIP_RDYn signal; this |
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