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FXPS7400DI4S Datasheet(PDF) 48 Page - NXP Semiconductors |
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FXPS7400DI4S Datasheet(HTML) 48 Page - NXP Semiconductors |
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48 / 71 page  NXP Semiconductors FXPS7400D4S Digital absolute pressure sensor, 20 kPa to 400 kPa 7.7.22 IC type register (Address C0h) The IC type register is a factory programmable OTP register that contains the IC type as defined below. This register is included in the factory programmed OTP array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set. Bit 7 6 5 4 3 2 1 0 Symbol ICTYPEID[7:0] Reset 0 0 0 0 0 0 1 0 Access R R R R R R R R Table 86. IC TYPE REGISTER (ICTYPEID address C0h) bit allocation 7.7.23 IC manufacturer revision register (Address C1h) The IC manufacturer revision register is a factory programmable OTP register that contains the IC revision. The upper nibble contains the main IC revision. The lower nibble contains the sub IC revision. This register is included in the factory programmed OTP array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set. Bit 7 6 5 4 3 2 1 0 Symbol ICREVID[7:0] Reset N/A N/A N/A N/A N/A N/A N/A N/A Access R R R R R R R R Table 87. IC MANUFACTURER REVISION REGISTER (ICREVID address C1h) bit allocation 7.7.24 IC manufacturer identification register (address C2h) The IC manufacturer identification register is a factory programmable OTP register that identifies NXP as the IC manufacturer. This register is included in the factory programmed OTP array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set. Bit 7 6 5 4 3 2 1 0 Symbol ICMFGID[7:0] Reset 0 0 0 0 0 0 1 0 Access R R R R R R R R Table 88. IC MANUFACTURER IDENTIFICATION REGISTER (ICMFGID address C2h) bit allocation 7.7.25 Part number register (address C4h, C5h) The part number registers are factory programmed OTP registers that include the numeric portion of the device part number. These registers are included in the factory programmed OTP array error detection. These registers are readable in SPI mode or I2C mode when ENDINIT is not set. Bit 7 6 5 4 3 2 1 0 Symbol PN0[7:0] Reset N/A N/A N/A N/A N/A N/A N/A N/A Access R R R R R R R R Table 89. PN0 Register (address C4h) bit allocation FXPS7400D4S All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 3 November 2023 48 / 71 |
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