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REF54300QDR Datasheet(PDF) 4 Page - Texas Instruments |
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REF54300QDR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 31 page ![]() 5 Pin Configuration and Functions Not to scale VREF DNC VIN NIC GND EN 1 2 3 6 5 4 NR DNC 7 8 Figure 5-1. D Package 8-Pin SOIC Top View Table 5-1. Pin Functions PIN TYPE DESCRIPTION NAME D EN 1 Input Device enable control. Low level input disables the reference output and device enters shutdown mode. Device can be enabled by driving voltage > 1.6V or leaving the EN pin floating. VIN 2 Power Input supply voltage connection. Connect a minimum 0.1-μF decoupling capacitor to ground for the best performance. NIC 3 No Connect Not internally connected. Pin can be left floating or to a known potential. GND 4 Ground Ground connection. NR 5 Output Noise reduction pin. Connect a decoupling capacitor to ground for improved noise performance. The pin can be left floating. VREF 6 Output Reference voltage output. Connect a capacitor between 1 μF to 100 μF to ground for best performance. DNC 7, 8 Do not Connect Leave the pin floating or connect it to ground REF54 SNVSCN7 – NOVEMBER 2023 www.ti.com 4 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: REF54 |
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