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LAN91C100FD Datasheet(PDF) 30 Page - SMSC Corporation

Part # LAN91C100FD
Description  FEAST Fast Ethernet Controller with Full Duplex Capability
PDF  67 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN91C100FD Datasheet(HTML) 30 Page - SMSC Corporation

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SMSC DS – LAN91C100FD REV. B
Page 30
Rev. 01-20-06
BANK 2
OFFSET
NAME
TYPE
SYMBOL
4
FIFO PORTS REGISTER
READ ONLY
FIFO
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO. The packet
numbers to be processed by the interrupt service routines are read from this register.
HIGH
BYTE
REMPTY
0
RX FIFO PACKET NUMBER
1
0
0
0
0
0
0
0
LOW
BYTE
TEMPTY
0
TX DONE PACKET NUMBER
1
0
0
0
0
0
0
0
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit in the Interrupt Status
Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only valid if REMPTY is
clear. The packet is removed from the RX FIFO using MMU Commands 3) or 4).
TEMPTY - No transmit packets in completion queue. For polling purposes, uses the TX_INT bit in the Interrupt Status
Register.
TX DONE PACKET NUMBER - Packet number presently at the output of the TX Completion FIFO. Only valid if TEMPTY
is clear. The packet is removed when a TX INT acknowledge is issued.
Note: For software compatibility with future versions, the value read from each FIFO register is intended to be written into
the PNR as is, without masking higher bits (provided TEMPTY and REMPTY = 0 respectively).
BANK 2
OFFSET
NAME
TYPE
SYMBOL
6
POINTER REGISTER
READ/WRITE
NOT EMPTY is a read
only bit
PTR
HIGH
BYTE
RCV
AUTO
INCR.
READ
ETEN
NOT
EMPTY
POINTER HIGH
0
0
0
0
0
0
0
0
LOW
BYTE
POINTER LOW
0
0
0
0
0
0
0
0
POINTER REGISTER - The value of this register determines the address to be accessed within the transmit or receive
areas. It will auto-increment on accesses to the data register when AUTO INCR. is set. The increment is by one for every
byte access, by two for every word access, and by four for every double word access. When RCV is set the address refers
to the receive area and uses the output of RX FIFO as the packet number, when RCV is clear the address refers to the
transmit area and uses the packet number at the Packet Number Register.
READ - Determines the type of access to follow. If the READ bit is high the operation intended is a read. If the READ bit is
low the operation is a write. Loading a new pointer value, with the READ bit high, generates a pre-fetch into the Data
Register for read purposes.



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