AM29LV6402M datasheet(36/57 Pages) AMD

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Am29LV6402M

January 23, 2006

RY/BY#: Ready/Busy#

The RY/BY# is a dedicated, open-drain output pin

which indicates whether an Embedded Algorithm is in

progress or complete. The RY/BY# status is valid after

the rising edge of the final WE# pulse in the command

sequence. Since RY/BY# is an open-drain output, sev-

eral RY/BY# pins can be tied together in parallel with a

pull-up resistor to V

CC.

If the output is low (Busy), the device is actively eras-

ing or programming. (This includes programming in

the Erase Suspend mode.) If the output is high

(Ready), the device is in the read mode, the standby

mode, or in the erase-suspend-read mode. Table 12

shows the outputs for RY/BY#.

DQ6 and DQ14: Toggle Bits I

Toggle Bit I on DQ6 and DQ14 indicates whether an

Embedded Program or Erase algorithm is in progress

or complete, or whether the device has entered the

Erase Suspend mode. Toggle Bit I may be read at any

address, and is valid after the rising edge of the final

WE# pulse in the command sequence (prior to the

program or erase operation), and during the sector

erase time-out.

During an Embedded Program or Erase algorithm op-

eration, successive read cycles to any address cause

DQ6 and DQ14 to toggle. The system may use either

OE# or CE# to control the read cycles. When the oper-

ation is complete, DQ6 and DQ14 stops toggling.

After an erase command sequence is written, if all sectors

selected for erasing are protected, DQ6 and DQ14 toggles

for approximately 100 µs, then returns to reading array data.

If not all selected sectors are protected, the Embedded

Erase algorithm erases the unprotected sectors, and ig-

nores the selected sectors that are protected.

The system can use DQ6 and DQ14 and DQ2 and DQ10

together to determine whether a sector is actively erasing or

is erase-suspended. When the device is actively erasing

(that is, the Embedded Erase algorithm is in progress), DQ6

and DQ14 toggle. When the device enters the Erase Sus-

pend mode, DQ6 and DQ14 stop toggling. However, the

system must also use DQ2 and DQ10 to determine which

sectors are erasing or erase-suspended. Alternatively, the

system can use DQ7 and DQ15 (see the subsection on

DQ7 and DQ15: Data# Polling).

If a program address falls within a protected sector,

DQ6 and DQ14 toggle for approximately 1 µs after the

program command sequence is written, then returns

to reading array data.

DQ6 and DQ14 also toggle during the erase-sus-

pend-program mode, and stops toggling once the Em-

bedded Program algorithm is complete.

Table 12 shows the outputs for Toggle Bit I on DQ6

and DQ14. Figure 9 shows the toggle bit algorithm.

Figure 21 in the “AC Characteristics” section shows

the toggle bit timing diagrams. Figure 22 shows the dif-

ferences between DQ2 and DQ10 and DQ6 and DQ14

in graphical form. See also the subsection on DQ2 and

DQ10: Toggle Bits II.

AM29LV6402M Datasheet(PDF) 36 Page - Advanced Micro Devices

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