ISL35822LP datasheet(39/75 Pages) INTERSIL

39 / 75 page

IEEE PCS REGISTERS (3.0 TO 3.25/3.0019’H)

Note (1): This bit is not permitted to be a PCS loopback bit by IEEE 802.3ae-2002 subclause 45.2.3.1.2 in 10GBASE-X PCS devices. Intersil has submitted a

maintenance request (#1113) to allow that use of this bit. Many XENPAK hosts, however, expect this loopback (which is mandatory for 10GBASE-R PCS

devices). Setting the 3.C001’h.7 bit, (Table 64) will activate this loopback enable bit, but cause the ISL35822 to be non-conforming to the current 802.3

specification. See “Loopback Modes ” on page 13).

Note (1): This bit is latched low on a detected Fault condition. It is set high on being read.

Note (1): Although the 802.3ae specification describes this register as type R/W, this register cannot have any value other than that reflecting the 10GBASE-X PCS.

Thus writing any other value is ignored, and the register is in effect type RO.

Table 57. IEEE PCS CONTROL 1 REGISTER

MDIO REGISTER ADDRESS = 3.0 (3.0000’h)

BIT(S)

NAME

SETTING

DEFAULT

R/W

DESCRIPTION

3.0.15

1.0.15

4.0.15

Reset

1 = reset

0 = reset done, normal

operation

0’b

R/W SC Writing 1 to this bit will reset the whole chip,

including the MDIO registers.

3.0.14(1)

PCS_LB_EN

Optionally, enable PCS

Loopback, otherwise

reserved

0’b

R/W

If enabled by EN_PCS_LB (see bit 3.C001’h.7,

Table 64) perform PCS Loopback, and is a R/W bit;

otherwise, effectively a reserved RO 0’b bit (1).

3.0.13

Speed Select

1 = 10Gbps

1’b

1 = bits 5:2 select speed

3.0.12

Reserved

00’h

3.0.11

LOPOWER

0 = Normal Power

0’b

R/W

No Low Power Mode, writes ignored

3.0.10:7

Reserved

3.0.6

Speed Select

1 = 10Gbps

1’b

1 = bits 5:2 select speed

3.0.5:2

Speed Select

0000 = 10Gbps

0’h

Operates at 10Gbps

3.0.1:0

Reserved

0’b

Table 58. IEEE PCS STATUS 1 REGISTER

MDIO REGISTER ADDRESS = 3.1 (3.0001’h)

BIT

NAME

SETTING

DEFAULT

R/W

DESCRIPTION

3.1.15:8

Reserved

00’h

3.1.7

Local Fault

1 = PCS Local Fault

Derived from Register 3.0008’h

3.1.6:3

Reserved

0’h

3.1.2

Rx Link Up

1 = PCS Rx Link Up

0 = PCS Rx Link Down

1 (1)

RO LL(1)

‘Up’ means CX4/LX4 signal level is OK, Byte

Synch and Lane-Lane Alignment have all

occurred

3.1.1

LoPwrAble

Low Power Ability

Device does not support a low power mode

3.1.0

Reserved

Table 59. IEEE PCS TYPE SELECT REGISTER

MDIO REGISTER ADDRESS = 3.7 (3.0007’h)

BIT

NAME

SETTING

DEFAULT

R/W

DESCRIPTION

3.7.15:2

Reserved

000’h

3.7.1:0

PCS Type

01 = 10GBASE-X

01b

RO(1)

Writes ignored

ISL35822

ISL35822LP Datasheet(PDF) 39 Page - Intersil Corporation

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