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MAX38913 Datasheet(PDF) 12 Page - Analog Devices

Part # MAX38913
Description  4μVRMS Ultra-Low-Noise 1A LDO with Two- Level Output Voltage Selection
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
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MAX38913 Datasheet(HTML) 12 Page - Analog Devices

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MAX38913, MAX38914
4µVRMS Ultra-Low-Noise 1A LDO with Two-
Level Output Voltage Selection
www.analog.com
Analog Devices | 12
Detailed Description
MAX38913/MAX38914 Overview
The MAX38913/MAX38914 is a low-noise linear regulator that delivers up to 1A of load current with as low as 4µVRMS
of output noise. The part has excellent output accuracy of ±1% over line, load, and temperature. The
MAX38913/MAX38914 can dynamically change its output voltage between two separate levels. The slew rate between
the output voltage levels is determined by the capacitor connected at BYP pin. The MAX38913/MAX38914 incorporates
soft-start and also has a pass-through mode which, when enabled, completely bypasses the linear regulator, shorting the
OUT to IN. The MAX38913/MAX38914 has a fast active discharge feature as well which connects the OUT pin to GND,
when the device is placed in shutdown. Optional Status Output pins like Power-OK and Power-On Reset (PORB) which
are available only in TDFN package variant provides additional flexibility of sequencing to other devices connected to
these pin-lines. MAX38913/MAX38914 includes overcurrent and overtemperature protection and are offered in space-
saving, lean, WLP and TDFN packages. MAX38913/MAX38914 has an operating temperature range from -40˚C to
+125˚C.
Modes of Operation
The MAX38913/MAX38914 features regulation, pass-through, and shutdown modes of operation. The modes are
selected based on the state of the EN1 and EN2 pins.
For the MAX38913, in the regulation modes (MODE 1 and MODE 2), output voltage is regulated to levels selected by the
RSEL inputs (see Figure 1). When EN2 and EN1 are at logic-low and logic-high states respectively, the device regulates
to the level selected by the RSEL1 pin (MODE 1). If both EN2 and EN1 are at a logic-high state, the device regulates to
the level selected by the RSEL2 pin (MODE 2). Both RSEL1 and RSEL 2 pins are read as VIN crosses the UVLO rising
threshold. The device holds the RSEL1 and RSEL2 values until VIN drops below the UVLO falling threshold. There are
33 possible output-voltage regulation levels. See the Output-Voltage Selection section for details about different output-
voltage level selection.
For the MAX38914, in the regulation modes (MODE 1 and MODE 2), output voltage is regulated to levels pre-programmed
at the factory (see Figure 2). When EN2 and EN1 are at logic-low and logic-high states respectively, the device regulates
to the level pre-programmed to correspond to MODE 1. If both EN2 and EN1 are at a logic-high state, the device regulates
to the level pre-programmed to correspond to MODE 2.
In both regulation modes, the device has excellent transient, power-supply rejection ratio (PSRR), and output noise
performance. The MAX38913/MAX38914 is optimized for applications requiring dynamic transitioning between two
regulation levels. The slew rate between the two regulation levels is defined by CBYP in both the up and down transition
directions. The slew rate is calculated by:
������������������������������
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=
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������������������������
=
50������������
������������������������
Slewing the output voltage from a high to a low level in the regulation mode requires the MAX38913/MAX38914 to shunt
high current to ground if the output capacitor is large and the output load current is light. For example, with CBYP = 47nF
and COUT = 100µF, the output voltage is stable while the device is sinking current in the amount of 106.4mA in order to
keep the output in regulation during slewing.
������ = ������������������������_������������������������ × (
������������������������
������������������������
) = 50������������ × (
100������������
47������������
) = 106.4������������
Slewing the output voltage from a low level to a high level is recommended to be done while the system is placed in the
low-current mode of operation. This is to assure that no current limit is tripped during this transition since IOUT is
dominated by COUT charging current. The device output current during this transition is:
������������������������ = ������������������������_������������������������ × (
������������������������
������������������������
) + ������������������������������
It is recommended to keep the load current constant during the voltage transition from one level to the other.
Once the EN2 and EN1 pins are set to logic-high and logic-low states, respectively, the device transitions to the pass-
through mode of operation. Figure 1 illustrates the mode transitions.



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