P83CL781 datasheet(22/76 Pages) PHILIPS

22 / 76 page

1997 Mar 14

Philips Semiconductors

Product speciﬁcation

Low voltage 8-bit microcontrollers with

UART and I2C-bus

P83CL781; P83CL782

12.4

Status of external pins

The status of the external pins during Idle and Power-down

mode is shown in Table 4. If the Power-down mode is

activated whilst accessing external Program Memory, the

port data that is held in the Special Function Register P2 is

restored to Port 2.

If the data is a logic 1, the port pin is held HIGH during the

Power-down mode by the strong pull-up transistor ‘p1’;

see Fig.9(a).

Table 4

Status of external pins during Idle and Power-down modes

12.5

Power Control Register (PCON)

The reduced power modes are activated by software using this Special Function Register. PCON is not bit addressable.

Table 5

Power Control Register (SFR address 87H)

Table 6

Description of PCON bits

Note

1. If logic 1s are written to PD and IDL at the same time, PD takes precedence. The reset value of PCON is (0XX00000).

MODE

MEMORY

ALE

PSEN

PORT 0

PORT 1

PORT 2

PORT 3

Idle

internal

port data

Idle

external

ﬂoating

port data

address

port data

Power-down

internal

port data

Power-down

external

ﬂoating

port data

76543210

SMOD

−−−

GF1

GF0

IDL

BIT

SYMBOL

FUNCTION

PCON.7

SMOD

Double Baud rate bit. When set to a logic 1 the baud rate is doubled when the serial port

SIO0 is being used in modes 1, 2 or 3.

PCON.6

−

Reserved

PCON.5

−

Reserved

PCON.4

−

Reserved

PCON.3

GF1

General purpose ﬂag bit

PCON.2

GF0

General purpose ﬂag bit

PCON.1

Power-down bit. Setting this bit activates the Power-down mode; see note 1.

PCON.0

IDL

Idle mode bit. Setting this bit activates the Idle mode; see note 1.

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