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Die Size (Unsawn)

1300 x 1200

51 x 47

µm

mils

Minimum Bond Pad Size

130 x 130

5.12 x 5.12

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

Advanced Low Power Schottky Logic – 74ALS00

Quad 2-Input NAND Gates in bare die form

High speed – 3ns (Min) propagation delay

Direct drop-in replacement for obsolete

components in long term programs.

Rev 1.1

23/01/24

Features:

Ordering Information

The following part suffixes apply:

No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54ALS00 

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (300 per tray capacity)

Sawn Wafer on Tape – On request

Unsawn Wafer – On request

Die Thickness <> 350µm(14 Mils) – On request

Assembled into Ceramic Package – On request

Die Dimensions in µm (mils)

1300 (51)

74ALS00 provides x4 independent 2-input NAND gates

performing the Boolean function Y = A • B or Y = A + B.

The device is fabricated using a 1.5µm 40V Bipolar

process. Internal circuitry comprises of 3 stages and

includes buffered outputs for high noise immunity and

stability. All inputs are equipped with protection circuits

against static discharge and transient excess voltage.

 

Description