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Die Size (Unsawn)

1400 x1300

55 x 51

µm

mils

Minimum Bond Pad Size

130 x 130

5.12 x 5.12

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

Advanced Low Power Schottky Logic – 74ALS51

2-wide 3-Input, 2-wide 2-Input AND-OR-Invert Gate IC in bare die form

Rev 1.1

24/01/24



High speed – 14ns (Max) propagation delay



Industrial Temperature Range



Direct drop-in replacement for obsolete

components in long term programs.

Features:

Ordering Information

The following part suffixes apply:



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54ALS51

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (400 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

Description

Die Dimensions in µm (mils)

1400 (55)

The 74ALS51 is fabricated using a 2µm 40V Bipolar

process. The device consists of two independent

combinations of gates each performing the logic AND-OR-

INVERT function. The IC integrates one 2-wide 3-input

gates and one 2-wide 2-input gates each performing

Boolean functions 1Y = (1A•1B•1C) + (1D•1E•1F) and

2Y = (2A•2B) + (2C•2D) respectively. All inputs are

protected against ESD and excess voltage transients.