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TMS320DM647 Datasheet(PDF) 108 Page - Texas Instruments |
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TMS320DM647 Datasheet(HTML) 108 Page - Texas Instruments |
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108 / 166 page ![]() www.ti.com VPxCLKINx VPxD[19:0] (Input) VPxCTLx (Input) 1 2 3 4 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 6.11.3.2 Video Data and Control Timing (Video Capture Mode) Table 6-37. Timing Requirements in Video Capture Mode for Video Data and Control Inputs (see Figure 6-22) -720 -900 NO. UNIT MIN MAX 1 tsu(VDATV-VKIH) Setup time, VPxDx valid before VPxCLKINx high 2.9 ns 2 th(VDATV-VKIH) Hold time, VPxDx valid after VPxCLKINx high 0.5 ns 3 tsu(VCTLV-VKIH) Setup time, VPxCTLx valid before VPxCLKINx high 2.9 ns 4 th(VCTLV-VKIH) Hold time, VPxCTLx valid after VPxCLKINx high 0.5 ns Figure 6-22. Video Port Capture Data and Control Input Timing 108 Peripheral Information and Electrical Specifications Submit Documentation Feedback |
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