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TMS320DM647 Datasheet(PDF) 113 Page - Texas Instruments |
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TMS320DM647 Datasheet(HTML) 113 Page - Texas Instruments |
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113 / 166 page ![]() www.ti.com 6.12.3 VIC Electrical Data/Timing STCLK 2 3 1 4 4 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 6.12.3.1 STCLK Timing Table 6-43. Timing Requirements for STCLK (1) (see Figure 6-26) -720 -900– NO. UNIT MIN MAX 1 tc(STCLK) Cycle time, STCLK 33.3 ns 2 tw(STCLKH) Pulse duration, STCLK high 16 ns 3 tw(STCLKL) Pulse duration, STCLK low 16 ns 4 tt(STCLK) Transition time, STCLK 3 ns (1) The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. Figure 6-26. STCLK Timing Submit Documentation Feedback Peripheral Information and Electrical Specifications 113 |
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