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TMS320DM647 Datasheet(PDF) 119 Page - Texas Instruments |
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TMS320DM647 Datasheet(HTML) 119 Page - Texas Instruments |
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119 / 166 page  www.ti.com 25 23 19 18 22 27 20 21 17 18 28 Stop Start Repeated Start Stop SDA SCL 16 26 24 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 Table 6-49. Switching Characteristics for I2C Timings (1) (see Figure 6-30) -720 -900 NO. PARAMETER STANDARD UNIT FAST MODE MODE MIN MAX MIN MAX 16 tc(SCL) Cycle time, SCL 10 2.5 µs Delay time, SCL high to SDA low (for a repeated START 17 td(SCLH-SDAL) 4.7 0.6 µs condition) Delay time, SDA low to SCL low (for a START and a repeated 18 td(SDAL-SCLL) 4 0.6 µs START condition) 19 tw(SCLL) Pulse duration, SCL low 4.7 1.3 µs 20 tw(SCLH) Pulse duration, SCL high 4 0.6 µs 21 td(SDAV-SCLH) Delay time, SDA valid to SCL high 250 100 ns 22 tv(SCLL-SDAV) Valid time, SDA valid after SCL low 0 0 0.9 µs Pulse duration, SDA high between STOP and START 23 tw(SDAH) 4.7 1.3 µs conditions 24 tr(SDA) Rise time, SDA 1000 20 + 0.1Cb(1) 300 ns 25 tr(SCL) Rise time, SCL 1000 20 + 0.1Cb(1) 300 ns 26 tf(SDA) Fall time, SDA 300 20 + 0.1Cb(1) 300 ns 27 tf(SCL) Fall time, SCL 300 20 + 0.1Cb(1) 300 ns 28 td(SCLH-SDAH) Delay time, SCL high to SDA high (for STOP condition) 4 0.6 µs 29 Cp Capacitance for each I2C pin 10 10 pF Figure 6-30. I2C Transmit Timings (1) Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed. Submit Documentation Feedback Peripheral Information and Electrical Specifications 119 |
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