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PCA8550 Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCA8550 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 12 page ![]() Philips Semiconductors Product specification PCA8550 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM 1998 Sep 29 7 AC CHARACTERISTICS LIMITS SYMBOL PARAMETER MIN MAX UNIT TMPD Mux input to output propagation delay 20.0 ns TSOV MUX_SELECT to output valid 22 ns TOVN OVERRIDE# to NON_MUX output delay 15.0 ns TOVM OVERRIDE# to mux output delay 25.0 ns TR Output rise time 1.0 3.0 ns/V TF Output fall time 1.0 3.0 ns/V CL Test load capacitance on Muxed/Non-Muxed outputs 15 pF I2C BUS fSCL I2C clock frequency 10 400 KHz TSCH I2C clock high time 600 ns TSCL I2C clock low time 1.3 ns TDSP I2C data spike time 0 50 ns TSDS I2C data setup time 100 ns TSDH I2C data hold time 0 ns TICR I2C input rise time (10–400pF bus) 20 300 ns TICF I2C input fall time (10–400pF bus) 20 300 ns TBUF I2C bus free time between start and stop 1.3 ns TSTS I2C repeated start condition setup 600 ns TSTH I2C repeated start condition hold 600 ns TSPS I2C stop condition setup 600 ns CB I2C bus capacitive load 400 pF TW Write cycle time1 TYPICAL = 15 ms NOTE: 1. WRITE CYCLE time can only be measured indirectly during write cycle. The device will not acknowledge its I2C address. |
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