PCD3755AP datasheet(11/32 Pages) PHILIPS

11 / 32 page

1997 Apr 16

Philips Semiconductors

Product speciﬁcation

8-bit microcontrollers with DTMF generator,

8 kbytes OTP and 128 bytes EEPROM

PCD3755A; PCD3755E;

PCD3755F

6.6

Musical scale frequencies

Finally, two octaves of musical scale in steps of semitones

can be realized, again assuming an oscillator frequency

fxtal = 3.58 MHz (Table 9). It is suggested to define the

frequency by the HGF register while the LGF contains

00H, disabling Low Group Frequency generation.

Table 9

Musical scale frequencies and their

implementation

Note

1. Standard scale based on A4 @ 440 Hz.

NOTE

HGF

VALUE

(HEX)

FREQUENCY (Hz)

STANDARD(1)

GENERATED

D#5

622.3

622.5

659.3

659.5

698.5

697.9

F#5

740.0

741.1

784.0

782.1

G#5

830.6

832.3

880.0

879.3

A#5

923.3

931.9

987.8

985.0

1046.5

1044.5

C#6

1108.7

1111.7

1174.7

1179.0

D#6

1244.5

1245.1

1318.5

1318.9

1396.9

1402.1

F#6

1480.0

1482.2

1568.0

1572.0

G#6

1661.2

1655.7

1760.0

1768.5

A#6

1864.7

1875.1

1975.5

1970.0

2093.0

2103.3

C#7

2217.5

2223.3

2349.3

2358.1

D#7

2489.0

2470.4

EEPROM AND TIMER 2 ORGANIZATION

The PCD3755A, PCD3755E and PCD3755F have

128 bytes of Electrically Erasable Programmable

Read-Only Memory (EEPROM). Such non-volatile storage

provides data retention without the need for battery

backup. In telecom applications, the EEPROM is used for

storing redial numbers and for short dialling of frequently

used numbers. More generally, EEPROM may be used for

customizing microcontrollers, such as to include a PIN

code or a country code, to define trimming parameters, to

select application features from the range stored in ROM.

The most significant difference between a RAM and an

EEPROM is that a bit in EEPROM, once written to a

logic 1, cannot be cleared by a subsequent write

operation. Successive write accesses actually perform a

logical OR with the previously stored information.

Therefore, to clear a bit, the whole byte must be erased

and re-written with the particular bit cleared. Thus, an

erase-and-write operation is the EEPROM equivalent of a

RAM write operation.

Whereas read access times to an EEPROM are

comparable to RAM access times, write and erase

accesses are much slower at 5 ms each. To make these

operations more efficient, several provisions are available

in the PCD3755A, PCD3755E and PCD3755F.

First, the EEPROM array is structured into 32 four-byte

pages (see Fig.5) permitting access to 4 bytes in parallel

(write page, erase/write page and erase page). It is also

possible to erase and write individual bytes. Finally, the

EEPROM address register provides auto-incrementing,

allowing very efficient read and write accesses to

sequential bytes.

To simplify the erase and write timing, the derivative 8-bit

down-counter (Timer 2) with reload register is provided.

In addition to EEPROM timing, Timer 2 can be used for

general real-time tasks, such as for measuring signal

duration and for defining pulse widths.

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