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PCD5095 Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCD5095 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 16 page ![]() 1997 Nov 19 7 Philips Semiconductors Objective specification DECT baseband controller PCD5095 LIFM 36 I 0.7 V ANAIOD1 negative input from line interface LIFP 37 I 0.7 V ANAIOD1 positive input from line interface VSSA 38 −− supply negative supply voltage for analog circuits MICM 39 I 0.7 V ANAIOR1 negative input from microphone MICP 40 I 0.7 V ANAIOR1 positive input from microphone VMIC 41 O off ANAIOD1 positive microphone supply voltage (+2 V) Vref 42 O 2.0 V ANAIOD1 reference voltage (+2 V) VBGP 43 O 1.25 V ANAIOR1 bandgap output voltage (+1.25 V) VDDA 44 −− supply positive supply voltage for analog circuits EARM 45 O 1.4 V ANAIOD1 negative output to earpiece EARP 46 O 1.4 V ANAIOD1 positive output to earpiece EN_WATCHDOG 47 I − DIUP0PES Watchdog Timer enable input P1.0 48 I/O H ISQ2CPES bidirectional 80C51 port pin P1.1 49 I/O H ISQ2CPES bidirectional 80C51 port pin P1.2 50 I/O H ISQ2CPES bidirectional 80C51 port pin GP_CLK7 51 O L ISP2DPES general purpose 6.912 MHz output DPLL_DATA 52 O L ISP2DPES data after clock recovery network R_SLICED 53 O L ISP2DPES R_DATA comparator output VDD5V_1 54 −− supply positive supply voltage 1 for the +5 V interface P1.3 55 I/O H ISQ2CPES bidirectional 80C51 port pin P1.4 56 I/O H ISQ2CPES bidirectional 80C51 port pin P1.5 57 I/O H ISQ2CPES bidirectional 80C51 port pin P1.6 58 I/O off ISI8DPES bidirectional 80C51 port pin P1.7 59 I/O off ISI8DPES bidirectional 80C51 port pin VDD3V_2 60 −− supply positive supply voltage 2 (+3 V) BZM 61 O L ANAIOD2 negative buzzer output BZP 62 O L ANAIOD2 positive buzzer output VSS2 63 −− supply negative supply voltage 2 VSS3 64 −− supply negative supply voltage 3 P3.0 65 I/O H ISQ2CPES bidirectional 80C51 port pin P3.1 66 I/O H ISQ2CPES bidirectional 80C51 port pin P3.2 67 I/O H ISQ2CPES bidirectional 80C51 port pin P3.3 68 I/O H ISQ2CPES bidirectional 80C51 port pin P3.4 69 I/O H ISQ2CPES bidirectional 80C51 port pin P3.5 70 I/O H ISQ2CPES bidirectional 80C51 port pin P3.6 71 I/O H ISQ2CPES bidirectional 80C51 port pin P3.7 72 I/O H ISQ2CPES bidirectional 80C51 port pin P2.0 73 I/O H ISQ2CPES bidirectional 80C51 port pin P2.1 74 I/O H ISQ2CPES bidirectional 80C51 port pin SYMBOL PIN I/O STATE AFTER RESET PIN TYPE PIN DESCRIPTION |
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