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PCF8593 Datasheet(PDF) 4 Page - NXP Semiconductors |
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PCF8593 Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 28 page ![]() 1997 Mar 25 4 Philips Semiconductors Product specification Low power clock/calendar PCF8593 5 BLOCK DIAGRAM handbook, full pagewidth MBD808 control/status hundredths of a second seconds minutes hours year/date weekdays/months timer alarm control alarm registers or RAM DIVIDER 1 : 256 100 : 128 100 Hz OSCILLATOR 32.768 kHz CONTROL LOGIC RESET ADDRESS REGISTER OSCI OSCO INT SCL SDA PCF8593 0F 08 07 01 00 I C-BUS INTERFACE 2 RESET VSS VDD 1 2 7 3 6 5 8 4 Fig.1 Block diagram. 6 PINNING SYMBOL PIN DESCRIPTION OSCI 1 oscillator input, 50 Hz or event-pulse input OSCO 2 oscillator output RESET 3 reset input (active LOW) VSS 4 negative supply SDA 5 serial data input/output SCL 6 serial clock input INT 7 open drain interrupt output (active LOW) VDD 8 positive supply Fig.2 Pin configuration. 1 2 3 4 8 7 6 5 PCF8593P PCF8593T VSS OSCI OSCO SCL SDA VDD MBD809 INT RESET |
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