Features

– Datasheet describes Mode 0 Operation

– Sixteen 256 byte Pages per Sector

– Sixteen 4 Kbyte Sectors per Block

– Eight uniform 64 Kbyte Blocks

–2.7V (V

– Device protection with Write Protect (WP) Pin

– Write Enable and Write Disable Instructions

– Software Write Protection:

Upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array

– 30 µs/Byte Typical

– Endurance: 10,000 Write Cycles Typical

Description

The AT25FS040 provides 4,194,304 bits of serial reprogrammable Flash memory

organized as 524,288 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation

are essential. The AT25FS040 is available in a space-saving 8-lead JEDEC SOIC and

8-lead Ultra Thin SAP packages.

Table 1. Pin Configuration

Pin Name

Function

CS

Chip Select

SCK

Serial Data Clock

SI

Serial Data Input

SO

Serial Data Output

GND

Ground

VCC

Power Supply

WP

Write Protect

HOLD

Suspends Serial

Input

High Speed

Small Sectored

SPI Flash

Memory

4M (524,288 x 8)

AT25FS040

Advance

Information

5107D–SFLSH–09/06

8-lead JEDEC SOIC

1

2

3

4

8

7

6

5

CS

SO

WP

GND

VCC

HOLD

SCK

SI

8-lead SAP

1

2

3

4

8

7

6

5

VCC

HOLD

SCK

SI

CS

SO

WP

GND

___

___

_____

Bottom View