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ZXLB1600 Datasheet(PDF) 11 Page - Zetex Semiconductors |
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ZXLB1600 Datasheet(HTML) 11 Page - Zetex Semiconductors |
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11 / 16 page ![]() APPLICATION NOTES Adjusting output voltage When connected as shown in the typical application circuit, the ZXLB1600 will produce a nominal output voltage of 28V. This can be adjusted by one of the three methods described below. 1) Output voltage adjustment by external resistors The internal reference and resistor divider network R1 and R2 set a nominal output of 28V. However, this network is accessible at the FB pin and can be shunted by means of external resistors to set different nominal output voltages. The potential divider defines output voltage according to the relationship: VOUT(dc) = (R1+R2)/R1 x 1.23V When using external resistors, these should be chosen with lower values than the internal resistors to minimize errors caused by the ±25% absolute value variation of the internal resistors. The internal resistors have high values in order to minimize these errors. The following table gives suggested E24/E96 resistor values for various output voltages. Required output voltage External resistor across R2 External resistor across R1 5V 280k 91k 12V 715k 82k 18V 1 M 75k 20V 1.15 M 75k 22V 1.15M 68.1k 25V 1.2 M 62k 2) Output adjustment by external voltage The internal voltage reference (Pin ADJ) may be overdriven by an external control voltage to set the output voltage. The relationship between applied voltage (VADJ) and output voltage (VOUT) is: VOUT = 22.86 x VADJ Note that the output can be set to any value between the input voltage and the maximum operating voltage in this way. However, some non-linearity in the above expression may occur at values of VADJ below approximately 0.5V. Also note that when driving the ADJ pin, the control voltage must have sufficiently low impedance to sink the bias current of the internal reference.(10 A max). 3) PWM output adjustment A Pulse Width Modulated (PWM) signal can be applied to the EN pin in order to adjust the output voltage to a value below the value set in in 1) or 2). This method of adjustment permits the device to be turned on and the output voltage set by a single logic signal applied to the EN pin. No external resistors or capacitors are required and the amplitude of the control signal is not critical, providing it conforms to the limits defined in the electrical characteristics. Two modes of adjustment are possible as described below: Filtered 'DC' mode If a PWM signal of 10kHz or higher is applied to the EN pin, the device will remain active when the EN pin is low. However, the input to the internal low pass filter will be switched alternately from VREF to ground, with a duty cycle (D) corresponding to that of the PWM signal. This will present a filtered dc voltage equal to the duty cycle multiplied by VREF to the control loop and will produce a dc output voltage lower than the maximum set value. This voltage is given by: VOUT = 28 x D A square wave signal applied to the EN pin, for example, will turn the device on and produce a nominal regulated output of 14V. ZXLB1600 ISSUE 3 - SEPTEMBER 2003 SEMICO NDUC TORS 11 |
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