PCK2010RADL datasheet(12/16 Pages) PHILIPS

12 / 16 page

Philips Semiconductors

Product specification

PCK2010RA

CK98R (100/133MHz) RCC spread spectrum

system clock generator

2001 Apr 02

AC WAVEFORMS

VM = 1.25 V @ VDDQ2 and 1.5 V @ VDDQ3

VX = VOL + 0.3 V

VY = VOH –0.3 V

VOL and VOH are the typical output voltage drop that occur with the

output load.

CPUCLK

@133MHz

1.5V

1.25V

VDDQ2

VSS

VDDQ3

VSS

THPOFFSET

SW00354

3v66

@66MHz

CPU leads 3V66

Figure 1. CPUCLK to 3V66 offset

1.5V

PCICLK

@ 33MHz

VDDQ3

VSS

VDDQ3

VSS

THPOFFSET

SW00356

3V66 leads PCICLK

3V66

@ 66MHz

Figure 2. 3V66 to PCI offset

CPUCLK

@ 133MHz

1.25V

IOAPIC

@ 16.6MHz

VDDQ2

VSS

VDDQ2

VSS

THPOFFSET

SW00357

CPUCLK leads IOAPIC

Figure 3. CPU to IOAPIC offset

THKP

DUTY CYCLE

THKH

TRISE

TFALL

THKL

TPKP

TPKH

TRISE

TFALL

TPKL

2.5V CLOCKING

INTERFACE

3.3V CLOCKING

INTERFACE

(TTL)

2.0

1.25

0.4

2.4

1.5

0.4

SW00242

Figure 4. 2.5V/3.3V clock waveforms

VDDQ2

2.5 V MEASUREMENT POINTS

VOH = 2.0 V

VIH = 1.7 V

1.25 V

VIL = 0.7 V

VOL = 0.4 V

VSS

SYSTEM

MEASUREMENT

POINTS

VDDQ3

3.3 V MEASUREMENT POINTS

VOH = 2.4 V

VIH = 2.0 V

1.5 V

VIL = 0.7 V

VOL = 0.4 V

VSS

COMPONENT

MEASUREMENT

POINTS

SYSTEM

MEASUREMENT

POINTS

COMPONENT

MEASUREMENT

POINTS

SW00243

Figure 5. Component versus system measure points

tPLZ

tPZL

SEL133/100,

SEL1, SEL0

GND

VDD

OUTPUT

LOW-to-OFF

OFF-to-LOW

VOL

VOH

OUTPUT

HIGH-to-OFF

OFF-to-HIGH

VSS

outputs

enabled

outputs

enabled

outputs

disabled

tPHZ

tPZH

SW00454

Figure 6. 3-State enable and disable times

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