TMD27723WA datasheet(42/60 Pages) OSRAM

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ams Datasheet

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[v1-21] 2016-Feb-16

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TMD2772/ TMD2772WA − Register Description

Status Register (0x13)

The Status Register provides the internal status of the device.

This register is read only.

Figure 45:

Status Register

ADC Channel Data Registers (0x14 − 0x17)

ALS data is stored as two 16-bit values. To ensure the data is

read correctly, a two-byte read I²C transaction should be used

with auto increment protocol bits set in the command register.

With this operation, when the lower byte register is read, the

upper eight bits are stored in a shadow register, which is read

by a subsequent read to the upper byte. The upper register will

read the correct value even if additional ADC integration cycles

end between the reading of the lower and upper registers.

Figure 46:

ADC Channel Data Registers

543

Reserved

PSAT

PINT

AINT

Reserved

PVALID

AVALID

Field

Bits

Description (Reset value = 0x00)

Reserved

Reserved. Bit reads as 0.

PSAT

Proximity Saturation. Indicates the proximity measurement saturated.

PINT

Proximity Interrupt. Indicates that the device is asserting a proximity

interrupt.

AINT

ALS Interrupt. Indicates that the device is asserting an ALS interrupt.

Reserved

3:2

Reserved. Bits read as 0.

PVALID

Proximity Valid. Indicates that the Proximity channel has completed

an integration cycle after the PEN bit has been asserted.

AVALID

ALS Valid. Indicates that the ALS channels have completed an

integration cycle after AEN has been asserted.

Address

Bits

Description (Reset value = 0x00)

C0DATA

0x14

7:0

ALS CH0 data low byte

C0DATAH

0x15

7:0

ALS CH0 data high byte

C1DATA

0x16

7:0

ALS CH1 data low byte

C1DATAH

0x17

7:0

ALS CH1 data high byte

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