TSL25203M datasheet(37/69 Pages) OSRAM

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Page 36

Datasheet, Public

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[v3-00] 2022-Dec-20

TSL2520 − Register O ver view

TRIGGER_MODE Register

Figure 47:

TRIGGER_MODE

Note(s):

1. Return to the Register Map (0xAE).

CONTROL Register

Figure 48:

CONTROL

Note(s):

1. Return to the Register Map (0xB1).

Addr: 0xAE

TRIGGER_MODE

Bit

Field

Reset

Type

Bit Description

7:3

Reserved

2:0

MOD_TRIGGER_

TIMING

0R/W

Sets the repetition rate of a modulator or sequencer

measurement. Counting will immediately start or

will wait for the first vsync pulse.

000: OFF

001: Normal = 2.844ms * WTIME

010: Long

= 45.511ms * WTIME

011: Fast

= 88.889μs * WTIME

100: Fastlong = 1.422ms * WTIME

101: vsync

= one vsync per WTIME step

110: Reserved

111: Reserved

Addr: 0xB1

CONTROL

Bit

Field

Reset

Type

Bit Description

7:4

Reserved

3SOFT_RESET

R/W

Software Reset. If set and executable, the Software

Reset will initialize the device in the same way as

hardware reset. Prior to invoking a SOFT_RESET the

oscillator must be switched on. Set PON=1.

2:1

Reserved

CLEAR_SAI_ACTIVE

R/W

Setting this bit will clear the Sleep After Interrupt

Active SAI_ACTIVE and start measurements if

enabled.

TSL25203M Datasheet(PDF) 37 Page - OSRAM GmbH

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