ADG790 datasheet(13/20 Pages) AD

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ADG790

Rev. 0 | Page 13 of 20

THEORY OF OPERATION

The ADG790 is a single-chip, CMOS switching solution that

comprises four SPDT switches and two 4:1 multiplexers. The

internal architecture used by the device groups the switches into

two sections, each optimized to provide the best performance in

terms of bandwidth and distortion. The on-chip parallel

interface controls the operation of all switches, allowing the

user to control switches from both sections simultaneously.

WIDE BANDWIDTH SECTION

The wide bandwidth section contains three SPDT switches

S1A/S1B-D1, S2A/S2B-D2, and S3A/S3B-D3. These switches

use a CMOS topology that ensures, besides low on resistance

and excellent flatness, the ability to switch signals up to the

supply rails. This, combined with the low switch capacitance,

provides the wide bandwidth required when switching high

frequency signals. The three SPDT switches are also optimized

to provide low propagation delay and excellent matching

between the channels, making the ADG790 ideal for applica-

tions that use multiple signals, such as universal USB switches

(full and high speed), or RGB video signals, such as VGA.

LOW DISTORTION SECTION

The low distortion section contains a single SPDT switch

(S4A/S4B-D4) and two 4:1 multiplexers (S5A/S5B/S5C/S5D-D5

and S6A/S6B/S6C/S6D-D6, respectively). The switches from

this section also use a CMOS topology that exhibits very low on

resistance and flatness while maintaining a wide bandwidth that

makes them suitable for a wide range of applications, including

low distortion audio and standard definition video signals. The

channels from the 4:1 multiplexers are matched to provide

optimal performance when used with differential signals such

as S-Video.

CONTROL INTERFACE

The operation of the ADG790 is controlled via a 4-wire parallel

interface. The logic levels applied to the IN1, IN2, and IN3 pins

control the operation of the switches from both the wide band-

width and low distortion sections, as shown in Table 4. The

shutdown pin (S/D) allows the user to disable all four SPDT

switches and force the 4:1 multiplexers into the S5B and S6B

positions, respectively. This function can be used to set up a low

speed communication protocol between the circuitry from both

sides of the device, which allows automatic configuration of the

switching function.

For example, in modern handset applications, where a single

connector is used as a multifunction communication port, the

S5B-D5 and S6B-D6 configuration obtained by setting the S/D

pin high can be used to detect the type of peripheral device

connected to the handset. The ADG790 then automatically routes

the required signals to the communication port connector.

Table 4. Truth Table

Logic Control Inputs

Switch Status

S/D

IN1

IN2

IN3

S1A-D1

S2A-D2

S3A-D3

S5D-D5

S6D-D6

S1B-D1

S2B-D2

S3B-D3

S4A-D4

S4B-D4

S5A-D5

S6A-D6

S5B-D5

S6B-D6

S5C-D5

S6C-D6

Off

1 X = logic state doesn’t matter.

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