IA82527-PLC44A-R datasheet(23/45 Pages) INNOVASIC

23 / 45 page

IA82527

04 May 2007

CAN Serial Communications Controller

As of Production Ver. 00

PRELIMINARY



 2007

EN21070504-00

www.Innovasic.com

Customer Support:

Page 23 of 45

1-888-824-4184

4.1.4

I/O Ports

The IA82527 provides two 8-bit low-speed input/output (I/O) ports. Depending on the CPU

interface mode selected, at least 7 and up to 16 I/O lines are available. Each I/O line is

individually programmable to function either as an input or an output.

4.1.5

Programmable Clock Output

Using an oscillator, clock divider register, and a driver circuit, the IA82527 provides a

programmable clock output. The output frequency range available is from the external crystal

frequency to that frequency divided by 15. The clock output allows the IA82527 to drive other

devices such as the host CPU.

4.2

Address Map

The IA82527 includes 256 8-bit locations that provide device configuration registers and

message storage. The address map is shown in Figure 5.

4.3

CAN Message Objects

Each CAN message object has a unique identifier and can be configured as either transmit or

receive, except for the last message object. The last message object is a receive-only buffer

with a special mask design to allow select groups of different message identifiers to be received.

Each message object contains control and status bits.

All message objects have separate transmit and receive interrupts and status bits that allow the

host CPU to determine when a message frame has been sent or received. The IA82527

implements a global masking feature that allows the user to globally mask any identifier bits of

the incoming message. This mask is programmable, which permits application-specific

message identification.

The Message Object Structure is shown in Figure 6.

IA82527-PLC44A-R Datasheet(PDF) 23 Page - InnovASIC, Inc