PHD3055L datasheet(3/7 Pages) PHILIPS

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Philips Semiconductors

Product specification

PowerMOS transistor

PHD3055L

Logic level FET

Fig.1. Normalised power dissipation.

PD% = 100

⋅P

D/PD 25 ˚C = f(Tmb)

Fig.2. Normalised continuous drain current.

ID% = 100

⋅I

D/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V

Fig.3. Safe operating area. T

mb = 25 ˚C

D & IDM = f(VDS); IDM single pulse; parameter tp

Fig.4. Transient thermal impedance.

th j-mb = f(t); parameter D = tp/T

Fig.5. Typical output characteristics.

D = f(VDS); parameter VGS

Fig.6. Typical on-state resistance.

DS(ON) = f(ID); parameter VGS

100

120

140

160

180

Tmb / C

PD%

Normalised Power Derating

120

110

100

0.5

0.2

0.1

0.05

0.02

D =

1us

10us

1ms

0.1s

10s

tp, pulse widtht (s)

Zth j-mb, Transient Thermal Impedance (K/W)

0.1

0.01

10ms

100us

100

120

140

160

180

Tmb / C

ID%

Normalised Current Derating

120

110

100

PHP3055L

VDS, Drain-Source voltage (Volts)

ID, Drain current (Amps)

Tj = 25 C

VGS = 3 V

3.5 V

4 V

4.5 V

5 V

10 V

100

1000

0.1

100

PHP3055E

VDS, Drain-source voltage (Volts)

ID, Drain current (Amps)

10 ms

100 ms

tp = 10 us

1 ms

100 us

RDS(ON)

VDS/ID

0.1

0.2

0.3

0.4

PHP3055L

ID, Drain current (Amps)

RDS(on), Drain-Source on resistance (Ohms)

VGS = 15 V

Tj = 25 C

4.5 V

5 V

5.5 V

10 V

September 1997

Rev 1.000

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