PAC7112 datasheet(14/56 Pages) FREESCALE

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MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2

Preliminary

Electrical Characteristics

Freescale Semiconductor

3.7.5

Chip Power Up and Voltage Drops

The VREG sub-modules LVI (low voltage interrupt), POR (power on reset) and LVR (low voltage reset)

handle chip power-up or drops of the supply voltage. Refer to Figure 2.

Figure 2. VREG Chip Power-up and Voltage Monitoring

3.7.6

Output Loads

The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external

DC load is allowed. Capacitive loads are specified in Table 18. Capacitors with X7R dielectricum are

required.

Table 18. VREG Recommended Load Capacitances

Rating

Symbol

Min

Typ

Max

Unit

Load Capacitance per VDD2.5 pin

NOTES:

1. Refer to Table 38 for the specific number of VDD2.5 pins on various packages. Each VDD2.5 pin should have the

recommended loading as described in Section 3.7.3, “Circuit Board Layout,” of the MAC7100 Microcontroller Family

Reference Manual (MAC7100RM).

CLVDD

200

220

12000

Load Capacitance on VDDPLL pin

CLVDDfcPLL

220

5000

LVI Disabled

due to LVR

VLVID

VLVRD

LVR

POR

LVI

VPORD

VLVRA

VLVIA

Time

LVI Enabled

VDDA

VDD2.5

Voltage

Note: Not to scale.

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