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PIC18F2525 Datasheet(PDF) 2 Page - Microchip Technology |
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PIC18F2525 Datasheet(HTML) 2 Page - Microchip Technology |
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2 / 8 page ![]() PIC18F2525/2620/4525/4620 DS80222B-page 2 © 2005 Microchip Technology Inc. 4. Module: DC Characteristics In Section 26.3 “DC Characteristics” (page 336), the specifications for VIL parameters D033B and D034 have been clarified and now read as follows: 5. Module: A/D Converter Characteristics In Table 26-24: A/D Converter Characteristics (page 359), specification A40 has been added: TABLE 26-24: A/D CONVERTER CHARACTERISTICS: PIC18FX525/X620 (INDUSTRIAL, EXTENDED) PIC18LFX525/X620 (INDUSTRIAL) 6. Module: Instruction Set In Table 24-2: PIC18FXXXX Instruction Set (pages 270-271), the ADDWF, ADDWFC and BTG instructions have been modified. The changes are shown in bold text: 26.3 DC Characteristics: PIC18F2525/2620/4525/4620 (Industrial, Extended) PIC18LF2525/2620/4525/4620 (Industrial) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial Param No. Symbol Characteristic Min Max Units Conditions VIL Input Low Voltage D033B D034 OSC1 T13CKI VSS VSS 0.3 0.3 V V XT, LP modes Param No. Symbol Characteristic Min Typ Max Units Conditions A40 IAD A/D Current from VDD PIC18FXXXX — 180 — μA Average current during conversion PIC18LFXX20 — 90 — μA TABLE 26-25: PIC18FXXXX INSTRUCTION SET Mnemonic, Operands Description Cycles 16-Bit Instruction Word Status Affected Notes MSb LSb BYTE-ORIENTED OPERATIONS ADDWF ADDWFC f, d, a f, d, a Add WREG and f Add WREG and Carry bit to f 1 1 0010 0010 01da 00da ffff ffff ffff ffff C, DC, Z, OV, N C, DC, Z, OV, N 1, 2 1, 2 BIT-ORIENTED OPERATIONS BTG f, b, a Bit Toggle f 1 0111 bbba ffff ffff None 1, 2 Note 1: When a Port register is modified as a function of itself (e.g., MOVF PORTB, 1, 0), the value used will be that value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is driven low by an external device, the data will be written back with a ‘0’. 2: If this instruction is executed on the TMR0 register (and where applicable, ‘d’ = 1), the prescaler will be cleared if assigned. |
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