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AD9995

–23–

Table X. MODE Register Data Bit Breakdown (D23 = MSB)

D23

14 13

10 9

Total Number of

7th Field

6th Field

5th Field

4th Field

3rd Field

2nd Field

1st Field

Fields to Use.

0 = Field 0

1 = 1st Field Only 5 = Field 5

5 = Field 5

7 = All 7 Fields

6, 7 = Invalid

0 = Invalid

EXAMPLE 1:

TOTAL FIELDS = 3, 1ST FIELD = FIELD 0, 2ND FIELD = FIELD 1, 3RD FIELD = FIELD 2

MODE REGISTER CONTENTS = 0x600088

FIELD 0

FIELD 1

FIELD 2

FIELD 3

FIELD 4

FIELD 5

FIELD 1

FIELD 4

FIELD 2

EXAMPLE 2:

TOTAL FIELDS = 2, 1ST FIELD = FIELD 3, 2ND FIELD = FIELD 4

MODE REGISTER CONTENTS = 0x400023

EXAMPLE 3:

TOTAL FIELDS = 4, 1ST FIELD = FIELD 5, 2ND FIELD = FIELD 1, 3RD FIELD = FIELD 4, 4TH FIELD = FIELD 2

MODE REGISTER CONTENTS = 0x80050D

Figure 24. Using the MODE Register to Select FieldTiming

MODE Register

The MODE register is a single register that selects the field tim-

ing of the AD9995.Typically, all of the field,V-sequence, and

V-pattern group information is programmed into the AD9995

at startup. During operation, the MODE register allows the user

to select any combination of field timing to meet the current

requirements of the system.The advantage of using the MODE

greatly reduces the system programming requirements during

camera operation. Only a few register writes are required when

the camera operating mode is changed, rather than having to

write in all of the vertical timing information with each camera

mode change.

A basic still camera application might require five different

fields of vertical timing: one for draft mode operation, one for

autofocusing, and three for still image readout. All of the reg-

ister timing information for the five fields would be loaded at

startup. Then, during camera operation, the MODE register

would select which field timing would be active, depending on

how the camera was being used.

Table X shows how the MODE register bits are used. The three

MSBs, D23–D21, are used to specify how many total fields will

be used. Any value from 1 to 7 can be selected using these three

bits. The remaining register bits are divided into 3-bit sections to

select which of the six fields are used and in which order. Up to

seven fields may be used in a single MODE write. The AD9995

will start with the Field timing specified by the first Field bits,

and on the next VD will switch to the timing specified by the

second Field bits, and so on.

After completing the total number of fields specified in Bits

D23 to D21, the AD9995 will repeat by starting at the first

Field again. This will continue until a new write to the MODE

tings for different field configurations.

REV. 0

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